Abstract: A conventional substrate processing apparatus for generating plasma cannot generate plasma with high density and thus throughput of substrate processing is low. In order to solve this problem, provided is a substrate processing apparatus including a reaction vessel having a tubular shape and provided with a coil installed at an outer circumference thereof; a cover installed at a first end of the reaction vessel; a gas introduction port installed at the cover; a first plate installed between the gas introduction port and an upper end of the coil; a second plate installed between the first plate and the upper end of the coil; a substrate processing chamber installed at a second end of the reaction vessel; and a gas exhaust part connected to the substrate processing chamber.

Abstract: Optimal layout of logic elements of semiconductor integrated circuits is achieved in conformity with the intention of the logic designer in a short period of time in an interactive mode. When logic blocks are to be laid out on a display screen, a logic block file consisting at least of logic block names, logic block sizes, and information on connection relationships with other logic blocks is used, and logic blocks essential for the designer's intention are laid out in random positions on a display screen, and then the connection relationships among the logic blocks are displayed according to the logic block file. In this procedure, whether the layout is appropriate or not is made readily recognizable by a table of relationships among the logic blocks.

Abstract: A logic circuit having a diagnostic function is disclosed in which each of first latches for applying data to combinational circuits included in the logic circuit and/or receiving data from the combinational circuits is provided with a second latch and a selector for selecting the output of the first latch in a first mode and for selecting the output of the second latch in a second mode. In a regular operation, the output of the first latch is never transferred through the second latch, and the selector is operated in the first mode. Accordingly, the output of the first latch is supplied directly to a succeeding combinational circuit, and thus the delay caused by the second latch in the prior art can be eliminated. Although the delay caused by the selector is unavoidable, this delay can be made far smaller than the delay caused by the second latch.