Patents by Inventor Toru Ikeuchi
Toru Ikeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11946777Abstract: A position detection device includes a position sensor including a coil and a magnetic core, and a signal processor. The signal processor generates a rectangular wave voltage applied to the coil, converts a current which flow through the coil by the rectangular wave voltage into a voltage and outputs the voltage, and acquires a voltage measurement value obtained by sampling the output voltage after predetermined time in synchronization with a timing of rising or falling of a waveform of the rectangular wave voltage. The predetermined time is set such that the voltage measurement value is restricted within a range of 40% or more and 99.999% or less with respect to a maximum value of the rectangular wave voltage when the coil is at a position where an inductance of the coil is minimum.Type: GrantFiled: June 17, 2022Date of Patent: April 2, 2024Assignee: AKEBONO BRAKE INDUSTRY CO., LTD.Inventors: Haruhito Watanabe, Toru Ikeuchi
-
Publication number: 20220404173Abstract: A position detection device includes a position sensor including a coil and a magnetic core, and a signal processor. The signal processor generates a rectangular wave voltage applied to the coil, converts a current which flow through the coil by the rectangular wave voltage into a voltage and outputs the voltage, and acquires a voltage measurement value obtained by sampling the output voltage after predetermined time in synchronization with a timing of rising or falling of a waveform of the rectangular wave voltage. The predetermined time is set such that the voltage measurement value is restricted within a range of 40% or more and 99.999% or less with respect to a maximum value of the rectangular wave voltage when the coil is at a position where an inductance of the coil is minimum.Type: ApplicationFiled: June 17, 2022Publication date: December 22, 2022Applicant: AKEBONO BRAKE INDUSTRY CO., LTD.Inventors: Haruhito WATANABE, Toru IKEUCHI
-
Patent number: 10862381Abstract: A rotary electrical machine has a first annular body and a second annular body that face opposite each other with a coil interposed therebetween, either the first annular body or the second annular body being provided with a permanent magnet, the first annular body and/or the second annular body rotating about the axis of a rotating shaft, and the driving force of a motor being extracted through the rotating first annular body or second annular body or through the axis of the rotating shaft rotating with the rotating first annular body or second annular body.Type: GrantFiled: December 19, 2014Date of Patent: December 8, 2020Assignee: CORELESS MOTOR CO., LTD.Inventors: Toru Ikeuchi, Manabu Shiraki
-
Publication number: 20170047833Abstract: A rotary electrical machine has a first annular body and a second annular body that face opposite each other with a coil interposed therebetween, either the first annular body or the second annular body being provided with a permanent magnet, the first annular body and/or the second annular body rotating about the axis of a rotating shaft, and the driving force of a motor being extracted through the rotating first annular body or second annular body or through the axis of the rotating shaft rotating with the rotating first annular body or second annular body.Type: ApplicationFiled: December 19, 2014Publication date: February 16, 2017Applicant: M-LINK CO., LTD.Inventors: Toru IKEUCHI, Manabu SHIRAKI
-
Patent number: 9263089Abstract: Herein disclosed are an editing apparatus, an editing method, and an editing program allowing quick editing of video data. In order to clip a section in the video data and play it to be broadcasted as a replay, receiving a request to start playback from a desired position, an in-point is set in response to the request, and an out-point is set in response to a request to finish playback. Then, other video data from the video data of a section between the in-point and the out-point is generated.Type: GrantFiled: November 18, 2008Date of Patent: February 16, 2016Assignee: GVBB Holdings S.A.R.L.Inventors: Koichi Abe, Shogo Tsubouchi, Yasushi Okamoto, Toru Ikeuchi
-
Patent number: 8234463Abstract: A data processing apparatus includes a memory which receives and outputs data with a predetermined data width, an operation circuit which outputs a read command or a write command to access the memory, and an access control circuit which replaces a part of first read data read from the memory with a partial data, and outputs partially replaced data as write data to the memory when receiving the write command and the partial data with a data width smaller than the predetermined data width associated with the write command, from the operation circuit. The access control circuit replaces a part of second read data which has been acquired in response to the read command outputted before, instead of the first read data, with the partial data, and outputs replaced partially data as the write data if the write command has been outputted in connection with a read command outputted before the write command.Type: GrantFiled: May 26, 2009Date of Patent: July 31, 2012Assignee: Renesas Electronics CorporationInventors: Toru Ikeuchi, Yukihiko Akaike
-
Publication number: 20100310231Abstract: Herein disclosed are an editing apparatus, an editing method, and an editing program allowing quick editing of video data. In order to clip a section in the video data and play it to be broadcasted as a replay, receiving a request to start playback from a desired position, an in-point is set in response to the request, and an out-point is set in response to a request to finish playback. Then, other video data from the video data of a section between the in-point and the out-point is generated.Type: ApplicationFiled: November 18, 2008Publication date: December 9, 2010Inventors: Koichi Abe, Shogo Tsubouchi, Yasushi Okamoto, Toru Ikeuchi
-
Publication number: 20090300297Abstract: A data processing apparatus includes a memory which receives and outputs data with a predetermined data width, an operation circuit which outputs a read command or a write command to access the memory, and an access control circuit which replaces a part of first read data read from the memory with a partial data, and outputs partially replaced data as write data to the memory when receiving the write command and the partial data with a data width smaller than the predetermined data width associated with the write command, from the operation circuit. The access control circuit replaces a part of second read data which has been acquired in response to the read command outputted before, instead of the first read data, with the partial data, and outputs replaced partially data as the write data if the write command has been outputted in connection with a read command outputted before the write command.Type: ApplicationFiled: May 26, 2009Publication date: December 3, 2009Applicant: NEC Electronics CorporationInventors: Toru Ikeuchi, Yukihiko Akaike
-
Patent number: 7603489Abstract: DMAC includes current transfer setting registers and next transfer setting registers. Each of the current transfer setting registers stores transfer source address, transfer destination address and transfer count. The next transfer setting registers stores a transfer setting of a DMA transfer carried out after completing a DMA transfer according to a current transfer setting stored in the current transfer setting registers as a next transfer setting. Further, flags are provided for controlling to write to each of the next transfer setting registers.Type: GrantFiled: May 18, 2007Date of Patent: October 13, 2009Assignee: NEC Electronics CorporationInventor: Toru Ikeuchi
-
Publication number: 20080005389Abstract: DMAC includes current transfer setting registers and next transfer setting registers. Each of the current transfer setting registers stores transfer source address, transfer destination address and transfer count. The next transfer setting registers stores a transfer setting of a DMA transfer carried out after completing a DMA transfer according to a current transfer setting stored in the current transfer setting registers as a next transfer setting. Further, flags are provided for controlling to write to each of the next transfer setting registers.Type: ApplicationFiled: May 18, 2007Publication date: January 3, 2008Applicant: NEC ELECTRONICS CORPORATIONInventor: Toru Ikeuchi