Abstract: A power semiconductor device includes an insulating substrate on which a first conductor layer is arranged on one surface, a first conductor that is connected to the first conductor layer via a first connecting material, and a semiconductor element that is connected to the first conductor via a first connecting material. When viewed from a direction perpendicular to an electrode surface of the semiconductor element, the first conductor includes a peripheral portion formed larger than the semiconductor element. A first recess is formed in the peripheral portion so that a thickness of the first connecting material becomes thicker than other portions.

Abstract: A stabilizer bushing including: a stabilizer bar; and two semi-tubular elastic half bodies each including an intermediate plate fitting of semicircular arc shape embedded therein. The elastic half bodies are bonded to an outer circumferential surface of the stabilizer bar such that two circumferential end faces thereof are mutually butted. The plate fitting is embedded in an axial direction. A notch-shaped recess is provided in a corner of axial ends of the circumferential end faces of each elastic half body. The recess extends in a radial direction of the elastic half body and opens onto an inner circumferential surface thereof, and a corner of axial ends of circumferential end portions of the plate fitting is exposed at the recess. A bottom corner of the recess extending in the radial direction of the elastic half body has a curved-concave inner surface shape.

Abstract: A stabilizer bushing including: a stabilizer bar; and two semi-tubular elastic half bodies each including an intermediate plate fitting of semicircular arc shape embedded therein. The elastic half bodies are bonded to an outer circumferential surface of the stabilizer bar such that two circumferential end faces thereof are mutually butted. The plate fitting is embedded in an axial direction. A notch-shaped recess is provided in a corner of axial ends of the circumferential end faces of each elastic half body. The recess extends in a radial direction of the elastic half body and opens onto an inner circumferential surface thereof, and a corner of axial ends of circumferential end portions of the plate fitting is exposed at the recess. A bottom corner of the recess extending in the radial direction of the elastic half body has a curved-concave inner surface shape.

Abstract: A seat rubber mounted onto a suspension component including: an outer peripheral plate-shaped part extending along a receiving part of the suspension to receive a coil spring; an annular curving part defined by a radially inner portion of the outer peripheral plate-shaped part rising along a riser part of the suspension; a center projecting part inserted into a positioning hole of the suspension while being positioned inside the outer peripheral plate-shaped part and projecting from a distal end of the curving part toward its proximal end; an annular groove provided between the curving part and the center projecting part while receiving the riser part; and a flat-plate shaped reinforcing member embedded in the outer peripheral plate-shaped part around the riser part outwardly away from the curving part so as to disperse and transmit an input from the coil spring to the receiving part.

Abstract: A fluid-filled cylindrical vibration-damping device including at least one orifice member attached to an inside of an outer cylindrical member so as to straddle openings of pocket portions and extend in a circumferential direction. An orifice passage is defined by covering an orifice forming groove of the orifice member with the outer cylindrical member. A stopper mechanism is constituted by contact between an inner shaft member and the outer cylindrical member via the orifice member. A reinforcing rib is formed in the orifice member so as to project from a bottom face of the orifice forming groove and extend in the circumferential direction while a projecting distal end face thereof is in contact with the outer cylindrical member. The reinforcing rib partitions at least a portion of a circumference of the orifice passage into a plurality of passages that have same fluid flow characteristics.

Abstract: Operational stability of the nonvolatile memory in plural power supply voltage modes set up in advance corresponding to the power supply voltage level is realized. A nonvolatile memory is configured with a memory array, a charge pump, a distributor for selecting an output voltage of the charge pump, and a sequencer for controlling operation of the charge pump and the distributor. The nonvolatile memory is also provided with an analyzer which notifies the sequencer of a power supply voltage mode selectively specified among plural power supply voltage modes set up in advance corresponding to power supply voltage levels, and which detects mismatch between the power supply voltage mode notified to the sequencer and an actually supplied power supply voltage and limits the operation of the charge pump and the distributor with the use of the sequencer, based on the detection result. An operational stability of the nonvolatile memory is realized.

Abstract: A fluid-filled cylindrical vibration-damping device including at least one orifice member attached to an inside of an outer cylindrical member so as to straddle openings of pocket portions and extend in a circumferential direction. An orifice passage is defined by covering an orifice forming groove of the orifice member with the outer cylindrical member. A stopper mechanism is constituted by contact between an inner shaft member and the outer cylindrical member via the orifice member. A reinforcing rib is formed in the orifice member so as to project from a bottom face of the orifice forming groove and extend in the circumferential direction while a projecting distal end face thereof is in contact with the outer cylindrical member. The reinforcing rib partitions at least a portion of a circumference of the orifice passage into a plurality of passages that have same fluid flow characteristics.

Abstract: A fluid-filled cylindrical vibration-damping device including: a main rubber elastic body elastically connecting an inner shaft member and an outer cylindrical member; a pair of first fluid chambers opposed to each other in a first diametric direction with the inner shaft member being interposed therebetween; and a pair of second fluid chambers opposed to each other in a second diametric direction orthogonal to the first diametric direction. Each partition wall that circumferentially partition the first fluid chambers and the second fluid chambers respectively extend between the inner shaft member and the outer cylindrical member in a direction in more proximity to the second diametric direction than to the first diametric direction. The main rubber elastic body is provided with a hollow portion so that at least a part of the wall of the second fluid chamber is defined by a thin-walled flexible film.

Abstract: Operational stability of the nonvolatile memory in plural power supply voltage modes set up in advance corresponding to the power supply voltage level is realized. A nonvolatile memory is configured with a memory array, a charge pump, a distributor for selecting an output voltage of the charge pump, and a sequencer for controlling operation of the charge pump and the distributor. The nonvolatile memory is also provided with an analyzer which notifies the sequencer of a power supply voltage mode selectively specified among plural power supply voltage modes set up in advance corresponding to power supply voltage levels, and which detects mismatch between the power supply voltage mode notified to the sequencer and an actually supplied power supply voltage and limits the operation of the charge pump and the distributor with the use of the sequencer, based on the detection result. Accordingly, operational stability of the nonvolatile memory is realized.

Abstract: To provide a technique which enables a load on a controller to be reduced by rapidly detecting n-bit errors during writing/erasing on a chip in ECC in a nonvolatile memory. A flash memory of the present invention, which is a nonvolatile memory that includes plural electrically erasable and writable nonvolatile memory cells and performs write-and-verify processing in a write operation on the nonvolatile memory cells, includes an ECC determination circuit that counts the number of bits of write error detected in the write-and-verify processing, and outputs the information, and a status register for holding pass/fail information of the write operation and the information about the number of bits of write error outputted from the ECC determination circuit.

Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.

Abstract: The present invention provides a nonvolatile memory having a plurality of memory banks having a plurality of erasable and programmable nonvolatile memory cells and capable of memory operation independently respectively. The nonvolatile memory is capable of sequentially receiving write data and a write start command by the number of write processing regions after a write instruction command, a write start address and the number of the write processing regions with the write start address as a start point are inputted, latching write data for one write processing region in one memory bank and thereafter starting writing to each memory cell in response to the write start command, and making parallel a latch operation at one memory bank and writing to each memory cell at other memory banks.

Abstract: A read command having designated a bank, can be inputted from outside. A read command having designated a bank can be inputted from outside while an operation for reading from a memory array to a data buffer is being performed at the bank. Further, a read command having designated a bank is inputted from outside, and a buffer read command having designated a bank is inputted from outside while an operation for reading from a memory array to a data buffer is being performed at the bank, whereby reading from the data buffer of the bank to the outside is enabled.

Abstract: To provide a technique which enables a load on a controller to be reduced by rapidly detecting n-bit errors during writing/erasing on a chip in ECC in a nonvolatile memory. A flash memory of the present invention, which is a nonvolatile memory that includes plural electrically erasable and writable nonvolatile memory cells and performs write-and-verify processing in a write operation on the nonvolatile memory cells, includes an ECC determination circuit that counts the number of bits of write error detected in the write-and-verify processing, and outputs the information, and a status register for holding pass/fail information of the write operation and the information about the number of bits of write error outputted from the ECC determination circuit.

Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.

Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.

Abstract: A magnetic disk drive has a low power consumption state in which the spindle motor is stopped for reducing the average power consumption when no read or write commands have been received. When a read or write command is received, the spindle motor is started. The time it takes to complete a read command is shorter than that for a write command as measured from the receipt of the read command or write command with the spindle motor stopped in the low power consumption state.

Abstract: A magnetic recording disk drive can prevent the deterioration of the head off-track characteristics and the reduction of the drive performance even when an erase band asymmetry resulting from a skew angle exists. A write inhibit slice value for an inner peripheral side offset is made smaller than a write inhibit slice value for an outer peripheral side offset at a position where an erase band on the inner peripheral side is greater than an erase band on the outer peripheral side, so that the adjacent track on the outer peripheral side cannot easily erase a data track. On the contrary, the inner periphery and the outer periphery are paraphrased at a position where the erase band on the outer peripheral side is greater than the erase band on the inner peripheral side.

Abstract: Disclosed herewith is a method for controlling the operation of non-volatile semiconductor chips with high sequential access performance realized by smoothing out the variation of the times for writing, erasing, and reading data in/from memory cells among sectors in each of the chips.

Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.