Patents by Inventor Toru Mitsuta

Toru Mitsuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5101340
    Abstract: An operation process indicating method comprising expressing each job in the form of a segment which is parallel to a time axis and whose end points are two points having the earliest start time and latest completion time of the job as their respective time coordinates, and connecting the earliest start time point on the segment and the latest completion time point on the segment expressive of the job preceding the first-mentioned job, with a segment, thereby to create and indicate an operation process chart. The operation process indicating method is useful as an aiding method for the operations of creating and revising an operation process in the case of operation planning.
    Type: Grant
    Filed: April 7, 1989
    Date of Patent: March 31, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Hisanori Nonaka, Toru Mitsuta, Yasuhiro Kobayashi
  • Patent number: 4984180
    Abstract: Graphic data of design objects designated by an input device are retrieved from a design object data memory and displayed on a display device. A restrictive item applied to the design object displayed on the display device and redesignated by the input device is read from the design object data memory. Specification data of the designated design objects are also read from the design object data memory. A condition part of the design reference is made based on the redesignated design object and the selected specification data, and an end portion of the design reference is made based on the redesignated design object, the selected restrictive item and a reference value entered by the input device. The design reference including the condition part and the end portion is displayed on the display device and stored into a design reference memory.
    Type: Grant
    Filed: November 22, 1989
    Date of Patent: January 8, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Wada, Yasuhiro Kobayashi, Toru Mitsuta
  • Patent number: 4831546
    Abstract: A layout design assisting system operates in the following steps. A drawing of a layout area for installing a plurality of layout objects is displayed on a display unit. The operator specifies one of the displayed layout objects. Another layout object which interferes with the specified layout object is found in the layout area. An economical loss imposed on the specified layout object attributable to the other layout object is evaluated. Examination is conducted as to whether or not the other layout object can be relocated so that it does not interfere with the specified layout object. The specified layout object, the other layout object, the economical loss and the examination result are displayed on the display unit.
    Type: Grant
    Filed: May 15, 1987
    Date of Patent: May 16, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Toru Mitsuta, Yutaka Wada, Yasuhiro Kobayashi
  • Patent number: 4789944
    Abstract: A design support apparatus displays components of a design object on a display screen in the same positional relationship as that of actual layout, and graphically displays an installation inhibit area for the components which is derived from the design object or its components, on the display scree. An operator may design the layout while he/she looks as the display screen to designate installation position of the components so that they do not enter into the installation inhibit area. The installation inhibit area displayed on the screen may be a minimal space from a wall of the component or a working space for the component.
    Type: Grant
    Filed: March 12, 1986
    Date of Patent: December 6, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Wada, Takashi Kiguchi, Yasuhiro Kobayashi, Toru Mitsuta