Patents by Inventor Toru Morikawa

Toru Morikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070216749
    Abstract: A thermal head includes a glass layer having a protruding section formed on one surface and a concave groove section formed on the other surface facing the protruding section, a plurality of heat generation resisters disposed substantially linearly on the protruding section, and a pair of electrodes provided to both sides of each of the heat generation resistors, wherein a part of each of the heat generation resistors exposed between the pair of electrodes is defined as a heat generation section, the glass layer is provided with the groove section so as to face a line of the heat generation sections, and reinforcement sections are provided on both sides of the line of the heat generation sections of the groove sections.
    Type: Application
    Filed: March 7, 2007
    Publication date: September 20, 2007
    Applicant: Sony Corporation
    Inventors: Noboru Koyama, Izumi Kariya, Mitsuo Yanase, Toru Morikawa
  • Patent number: 7188351
    Abstract: A disc cartridge includes a cartridge body unit having an optical disc (2) rotatably housed in it and provided with a recording and/or reproducing aperture (13) for exposing a part of the disc to outside, and a shutter member (15) slidably carried by the cartridge body member (5). A shutter opening/closing member (63) provided to a disc drive device (50) slides on the shutter member. The shutter member also includes an engagement opening (17a) engaged by the shutter opening/closing member. The shutter member operates for opening/closing the recording and/or reproducing aperture. The shutter member includes a collision buffering part (20) for absorbing the shock of collision against the shutter opening/closing member.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: March 6, 2007
    Assignee: Sony Corporation
    Inventors: Kazuhito Kurita, Mikinori Matsuda, Takahiro Yamada, Toru Morikawa
  • Publication number: 20060202731
    Abstract: A clock signal is provided with amplitudes of a plurality of levels and flip-flop circuits having different threshold values are used so that at least two different frequencies can be simultaneously supplied through one clock signal line.
    Type: Application
    Filed: March 9, 2006
    Publication date: September 14, 2006
    Inventors: Akira Takahashi, Jiro Miyake, Toru Morikawa
  • Publication number: 20060168597
    Abstract: A disk recording/reproducing apparatus 101 includes: a chassis 103 rotatably supporting a holder 102 for storing a disk cartridge; an eject lever 105 disposed in the chassis movably in an insertion/removal direction of the disk cartridge and movably in a direction toward or away from the chassis, the eject lever being rotated by being pushed by the disk cartridge 1 inserted into the holder; and cartridge drop preventive means 221 for preventing the disk cartridge 1 ejected by the eject lever 105 from dropping from the cartridge holder 102. The cartridge drop preventive means 221 is formed from a flat spring disposed on one side surface 102b of the holder and makes a sliding contact with one side surface 3b of the disk cartridge during unloading of the cartridge so as to give the disk cartridge a braking force. This arrangement can prevent the disk cartridge from jumping out and dropping off from the cartridge holder during ejection.
    Type: Application
    Filed: May 10, 2005
    Publication date: July 27, 2006
    Applicant: Sony Corporation
    Inventors: Takahiro Yamada, Kazuhito Kurita, Mikinori Matsuda, Toru Morikawa
  • Publication number: 20060080698
    Abstract: A disc cartridge includes a cartridge body unit having an optical disc (2) rotatably housed in it and provided with a recording and/or reproducing aperture (13) for exposing a part of the disc to outside, and a shutter member (15) slidably carried by the cartridge body member (5). A shutter opening/closing member (63) provided to a disc drive device (50) slides on the shutter member. The shutter member also includes an engagement opening (17a) engaged by the shutter opening/closing member. The shutter member operates for opening/closing the recording and/or reproducing aperture. The shutter member includes a collision buffering part (20) for absorbing the shock of collision against the shutter opening/closing member.
    Type: Application
    Filed: December 20, 2004
    Publication date: April 13, 2006
    Applicant: SONY CORPORATION
    Inventors: Kazuhito Kurita, Mikinori Matsuda, Takahiro Yamada, Toru Morikawa
  • Publication number: 20060075410
    Abstract: A disk cartridge is provided which includes an optical disk (2), a cartridge body (5) having formed therein a head opening (13) through which a part of the optical disk (2) is exposed to outside in a range between the inner and outer radii thereof, a shutter member (15) supported movably on the cartridge body (5) to uncover and cover the head opening (13), and a two-way forcing mechanism (38) to force the shutter member (15) toward any selected one of positions to cover and uncover the head opening (13). The two-way forcing mechanism (38) forces the shutter member (15) toward any selected one of the positions to cover and uncover the head opening (13) correspondingly to a position of the shutter member (15) relative to the head opening (13).
    Type: Application
    Filed: October 27, 2004
    Publication date: April 6, 2006
    Inventors: Takashi Ohgi, Takahiro Yamada, Kazuhito Kurita, Tokio Kanada, Toru Morikawa
  • Publication number: 20050248879
    Abstract: The present invention provides lock release means that allows spring constant of the lock release means to be set to any desired value without regard to a material used for a cartridge holder. A disk recording and/or reproducing apparatus includes: recording and/or reproducing means disposed in a chassis; a cartridge holder supported on the chassis movably between an insertion and withdrawal position, at which a disk cartridge is inserted or removed, and a recording and reproducing position, at which the disk cartridge is recorded or reproduced by the recording and/or reproducing means; an eject lever disposed on an upper surface of the chassis so as to be movable in a disk cartridge insertion and withdrawal direction; eject lever lock means disposed on the upper surface of the chassis; and lock release means mounted on the cartridge holder such that a leading end side of the lock release means advances into the cartridge holder from an upper surface of the cartridge holder.
    Type: Application
    Filed: April 18, 2005
    Publication date: November 10, 2005
    Applicant: Sony Corporation
    Inventors: Mikinori Matsuda, Kazuhito Kurita, Toru Morikawa, Takahiro Yamada
  • Publication number: 20050251819
    Abstract: Disclosed herein is a disk cartridge including a disk; a cartridge body in which the disk is rotatably accommodated, the cartridge body having a recording and/or reproducing window for exposing a part of the disk; a shutter mounted on the cartridge body so as to be movable between a closed position where the window is closed by the shutter and an open position where the window is opened by sliding the shutter; a shutter locking member adapted to engage a locking portion of the cartridge body when the shutter is in the closed position, thereby limiting the movement of the shutter in the direction of opening the window; a biasing member provided on the shutter for biasing the shutter locking member in the direction of engaging the shutter locking member with the locking portion of the cartridge body; and a deformation preventing member provided in the cartridge body at a position inside of the biasing member for preventing the deformation of the biasing member inward of the cartridge body.
    Type: Application
    Filed: April 19, 2005
    Publication date: November 10, 2005
    Applicant: Sony Corporation
    Inventors: Toru Morikawa, Kazuhito Kurita, Mikinori Matsuda, Takahiro Yamada
  • Publication number: 20050251817
    Abstract: A recording and/or reproduction apparatus includes a chassis, a recording and/or reproduction device provided on the chassis so as to perform recording and/or reproduction on a disk cartridge, a cartridge holder for holding the disk cartridge, the cartridge holder being supported to be movable between a disk cartridge insertion/draw-out position and a recording/reproduction position relative to the chassis, an eject lever provided to be movable in the direction for insertion and draw-out of the disk cartridge relative to the chassis, a biasing device for biasing the eject lever in a disk cartridge discharging direction, a shutter unlocking member mounted to one side surface of the cartridge holder, and a shutter unlocking member movement restriction portion provided on the chassis and operable to restrict the shutter lock unlocking member from moving in the direction of spacing away from the one side surface when the cartridge holder is located in the recording/reproduction position.
    Type: Application
    Filed: April 21, 2005
    Publication date: November 10, 2005
    Applicant: Sony Corporation
    Inventors: Takahiro Yamada, Kazuhito Kurita, Mikinori Matsuda, Toru Morikawa
  • Publication number: 20050033542
    Abstract: A debugger apparatus according to the present embodiment comprises a host, CPU, a plurality of E-memory units (emulation memory units) for storing instructions, and an execution supervision unit. The host traces the instructions to be stored in the E-memory units and transfers the tracing result in the form of an instruction sequence. The execution supervision unit is connected to the CPU, E-memory units, and host. The execution supervision unit individually writes the instruction sequences transferred from the host in the plurality of E-memory units, reads an instruction sequence from one of the plurality of E-memory units in accordance with an instruction address of the CPU to thereby transfer the instruction sequence to the CPU, and outputs an instruction rewriting order to the host when the instruction address of the CPU is irrelevant.
    Type: Application
    Filed: July 27, 2004
    Publication date: February 10, 2005
    Inventors: Toru Morikawa, Kazuhide Watanabe, Shinya Miyaji
  • Patent number: 6809461
    Abstract: A drive unit includes a drive shaft at an end of a vibrating element that expands and contracts in the predetermined axial direction by application of a predetermined voltage, wherein a movable member is moved by differentiating the speed of expansion and contraction in the predetermined axial direction, a fixing member is fixed to one end of the vibrating element and the other end is fixed to the drive shaft, and a damping member fixes the fixing member to the drive unit while damping vibrations are provided.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: October 26, 2004
    Assignee: Sony Corporation
    Inventors: Kazuhito Kurita, Toru Morikawa
  • Publication number: 20030168940
    Abstract: In a drive unit including a drive shaft at an end of a vibrating element that expands and contracts in the predetermined axial direction by being applied with a predetermined voltage, wherein a movable member is moved by differentiating the speed of expansion and contraction in the a predetermined axial direction, a fixing member fixed to the end of the vibrating element whereof the other end is fixed to the drive shaft, and a damping member for fixing the fixing member to the drive unit while damping vibrations are provided.
    Type: Application
    Filed: January 8, 2003
    Publication date: September 11, 2003
    Inventors: Kazuhito Kurita, Toru Morikawa
  • Patent number: 6237084
    Abstract: A processor which executes positive conversion processing, which converts coded data into uncoded data, and saturation calculation processing, which rounds a value to an appropriate number of bits, at high speed. When a positive conversion saturation calculation instruction “MCSST D1” is decoded, the sum-product result register 6 outputs its held value to the path P1. The comparator 22 compares the magnitude of the held value of the sum-product result register 6 with the coded 32-bit integer “0x0000_00FF”. The polarity judging unit 23 judges whether the eighth bit of the value held by the sum-product result register 6 is “ON”. The multiplexer 24 outputs one of the maximum value “0x0000_00FF” generated by the constant generator 21, the zero value “0x0000_0000” generated by the zero generator 25, and the held value of the sum-product result register 6 to the data bus 18.
    Type: Grant
    Filed: September 20, 1999
    Date of Patent: May 22, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Morikawa, Nobuo Higaki, Akira Miyoshi, Keizo Sumida
  • Patent number: 6161171
    Abstract: A first instruction requiring that a data word should be read out from a data memory and be stored in a certain register in a register set, and then a second instruction requiring that two operands, respectively read out from the register and another register in the register set, should be added are pipeline-processed. In a high-speed mode in which an operation clock having a higher frequency is supplied, a data cache intervened between an instruction execution circuit and the data memory is controlled to supply a data word to a WB (write back) stage of the instruction execution circuit within two cycles with respect to an input address associated with the first instruction. In order to execute the second instruction, the data word is supplied from the WB stage to an EX (operation execution) stage of the instruction execution circuit.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: December 12, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Morikawa, Nobuo Higaki, Shinji Ozaki, Keisuke Kaneko, Satoshi Ogura, Masato Suzuki
  • Patent number: 6052358
    Abstract: A head feeding mechanism used for an apparatus for recording and/or reading information signals on/from such a recording medium as an optical disk comprises a head mechanism, a feed screw, a rotation driving mechanism, a base, and a forcing mechanism. The feed screw is engaged with the head mechanism and rotated to feed the head mechanism. The rotation driving mechanism drives the feed screw to rotate. On the base is arranged the rotation driving mechanism. The base includes a pair of bearings used for the feed screw. At least one of the pair of bearings is a thrust bearing. The forcing mechanism is provided on the base and butts against one end of the feed screw. The forcing mechanism applies a force working on the feed screw both in the thrust direction and in the direction orthogonal to the thrust direction.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: April 18, 2000
    Assignee: Sony Corporation
    Inventors: Toru Morikawa, Takashi Izuka
  • Patent number: 6018796
    Abstract: A data processor comprises a processing unit which processes an instruction in pipeline stages, the number of which is switchable between n and m, m being a larger number than n. The data processor also comprises a switching unit for switching the number of the pipeline stages of the processing unit between n and m. The switching unit comprises an indicating unit for indicating whether the data processor is in a first operating condition or in a second operating condition, depending either on the frequency of the operation clock provided for the data processor or on the power source voltage supplied to the data processor, and a pipeline control unit for ordering a processing unit to operate in n stages under the first operation condition, and for ordering the processing unit to operate in m stages under the second operating condition.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: January 25, 2000
    Assignee: Matsushita Electric Industrial Co.,Ltd.
    Inventors: Masato Suzuki, Toru Morikawa, Nobuo Higaki, Shinya Miyaji
  • Patent number: 5974540
    Abstract: A processor which executes positive conversion processing, which converts coded data into uncoded data, and saturation calculation processing, which rounds a value to an appropriate number of bits, at high speed. When a positive conversion saturation calculation instruction "MCSST D1" is decoded, the sum-product result register 6 outputs its held value to the path P1. The comparator 22 compares the magnitude of the held value of the sum-product result register 6 with the coded 32-bit integer "0x0000.sub.-- 00FF". The polarity judging unit 23 judges whether the eighth bit of the value held by the sum-product result register 6 is "ON". The multiplexer 24 outputs one of the maximum value "0x0000.sub.-- 00FF" generated by the constant generator 21, the zero value "0x0000.sub.-- 0000" generated by the zero generator 25, and the held value of the sum-product result register 6 to the data bus 18.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: October 26, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Morikawa, Nobuo Higaki, Akira Miyoshi, Keizo Sumida
  • Patent number: 5909565
    Abstract: An information processing device, including a main processor and a coprocessor for processing data according to instructions stored in memory, which is composed of an instruction bus for transmitting instructions from memory to the main processor and coprocessor; a first bus used for transmitting data from the main processor to the coprocessor; a second bus used for transmitting data from the coprocessor to the main processor; instruction detecting means for detecting coprocessor calculation instructions out of the instructions received from memory; operand identifying means for identifying source registers and destination registers specified by operands in a detected instruction; data supplying means for supplying data from the identified source registers to the coprocessor via the first bus; data storing means for storing coprocessor calculation results in the identified destination registers; coprocessor instruction detecting means for detecting coprocessor calculation instructions out of all of the instru
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: June 1, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Morikawa, Nobuo Higaki, Shinya Miyaji
  • Patent number: RE39121
    Abstract: A processor which executes positive conversion processing, which converts coded data into uncoded data, and saturation calculation processing, which rounds a value to an appropriate number of bits, at high speed. When a positive conversion saturation calculation instruction “MCSST D1” is decoded, the sum-product result register 6 outputs its held value to the path P1. The comparator 22 compares the magnitude of the held value of the sum-product result register 6 with the coded 32-bit integer “0x0000_00FF”. The polarity judging unit 23 judges whether the eighth bit of the value held by the sum-product result register 6 is “ON”. The multiplexer 24 outputs one of the maximum value “0x0000_00FF” generated by the constant generator 21, the zero value “0x0000_0000” generated by the zero generator 25, and the held value of the sum-product result register 6 to the data bus 18.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: June 6, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Morikawa, Nobuo Higaki, Akira Miyoshi, Keizo Sumida