Patents by Inventor Toru Nomura

Toru Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030015775
    Abstract: A resin-encapsulation semiconductor device of this invention includes a die pad for mounting a semiconductor element; a plurality of supporting leads; a semiconductor element; a plurality of leads disposed to have tips thereof opposing the die pad; metal wires; and an encapsulation resin for encapsulating the die pad excluding a bottom thereof, the leads excluding bottoms and outside edges thereof, connecting regions with the metal wires, the supporting leads and the semiconductor element. The outside edges of the leads are disposed on substantially the same plane as the side face of the encapsulation resin, and the tip of each lead has a thin portion where the thickness is reduced in an upper face thereof.
    Type: Application
    Filed: July 22, 2002
    Publication date: January 23, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masanori Minamio, Toru Nomura
  • Patent number: 6498393
    Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: December 24, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
  • Publication number: 20020160552
    Abstract: A terminal land frame includes a frame body and a plurality of lands. Each of these lands is formed out of the frame body to be connected to the frame body via a thinned portion and protrude therefrom. When the lands are pressed in a direction in which the lands protrude from the frame body, the thinned portions are fractured and the lands are easily separable from the frame body. A semiconductor chip is mounted on some of the lands of the terminal land frame, and the chip, wires and so on, are single-side-molded with a resin encapsulant. Thereafter, when the lands are pressed on the bottom, the lands are separated from the frame body. As a result, a structure, in which the lower part of each of these lands protrudes downward from the lower surface of the resin encapsulant, is obtained, and that protruding portion is used as an external electrode. In this manner, a downsized and thinned resin-molded semiconductor device is provided at a lower cost and with higher reliability.
    Type: Application
    Filed: June 10, 2002
    Publication date: October 31, 2002
    Applicant: Matsushita Electronics Corporation
    Inventors: Masanori Minamio, Osamu Adachi, Toru Nomura
  • Publication number: 20020137254
    Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; a resin encapsulant; and a mark member. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. The mark member is embedded in the upper surface of the resin encapsulant. The mark member, which is transferred from a transfer sheet in a single process step, is highly visible and can be formed efficiently.
    Type: Application
    Filed: May 23, 2002
    Publication date: September 26, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
  • Publication number: 20020121650
    Abstract: A resin-encapsulated semiconductor device includes a die pad, a semiconductor chip mounted on the die pad, and a group of leads. The group of leads include at least three kinds of leads, including first, second and third leads. While the first lead and the third lead are connected to each other upon production of the lead frame, the first lead and the third lead are separated from each other in a subsequent step. Moreover, a thin metal wire for connecting an electrode of the semiconductor chip to the bonding pad of each lead, and an encapsulation resin for encapsulating the semiconductor chip, the leads, the thin metal wire, etc., are provided. The pad of each lead is exposed on a surface of the encapsulation resin so that the pad can function as an external terminal.
    Type: Application
    Filed: February 27, 2002
    Publication date: September 5, 2002
    Inventors: Masanori Minamio, Toru Nomura, Fumihiko Kawai
  • Publication number: 20020121670
    Abstract: A lead frame includes a die pad, a suspension lead and a plurality of leads. The group of leads include at least three kinds of leads, including first, second and third leads. While the first lead and the third lead are connected to each other upon production of the lead frame, a connecting portion therebetween has a smaller thickness than that of the frame body so that the first lead and the third lead can be separated from each other in a subsequent step.
    Type: Application
    Filed: February 27, 2002
    Publication date: September 5, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masanori Minamio, Toru Nomura, Fumihiko Kawai
  • Publication number: 20020050631
    Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; and a resin encapsulant. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate and a second bottom face of the semiconductor chip is in contact with the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. A level difference exists between a first bottom face and the second bottom face of the semiconductor chip. The first and second bottom faces are respectively located at a peripheral portion and a central portion of the semiconductor chip. A part of the resin encapsulant is interposed between the first bottom face and the upper surface of the wiring substrate.
    Type: Application
    Filed: October 24, 2001
    Publication date: May 2, 2002
    Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
  • Publication number: 20020052056
    Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; a resin encapsulant; and a mark member. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. The mark member is embedded in the upper surface of the resin encapsulant. The mark member, which is transferred from a transfer sheet in a single process step, is highly visible and can be formed efficiently.
    Type: Application
    Filed: October 24, 2001
    Publication date: May 2, 2002
    Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
  • Publication number: 20010040286
    Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.
    Type: Application
    Filed: December 26, 2000
    Publication date: November 15, 2001
    Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
  • Patent number: 6225146
    Abstract: In a lead frame, inside inner leads are supported by supporting leads through an insulator. The inside inner leads and outside inner leads are separated from one another and are doubly arranged. In manufacturing a semiconductor device by using this lead frame, a semiconductor chip is mounted on the insulator, and the semiconductor chip is connected with the inside inner leads and the outside inner leads through metal wires, and the resultant is sealed with a resin. Thus, projections provided on the bottoms of the inside inner leads and the outside inner leads can work as external terminals. Since the external terminals can be disposed two-dimensionally on the bottom the lead frame is applicable to high density packaging and multi-pin devices, and can additionally provide a so-called burr-less structure free from uncut waste of the resin.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: May 1, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Yukio Yamaguchi, Akira Oga, Toru Nomura, Masanori Minamio
  • Patent number: 5977615
    Abstract: In a lead frame, inside inner leads are supported by supporting leads through an insulator. The inside inner leads and outside inner leads are separated from one another and are doubly arranged. In manufacturing a semiconductor device by using this lead frame, a semiconductor chip is mounted on the insulator, and the semiconductor chip is connected with the inside inner leads and the outside inner leads through metal wires, and the resultant is sealed with a resin. Thus, projections provided on the bottoms of the inside inner leads and the outside inner leads can work as external terminals. Since the external terminals can be disposed two-dimensionally on the bottom, the lead frame is applicable to high density packaging and multi-pin devices, and can additionally provide a so-called burr-less structure free from uncut waste of the resin.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: November 2, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Yukio Yamaguchi, Akira Oga, Toru Nomura, Masanori Minamio
  • Patent number: 5759367
    Abstract: An insulating glass film is formed on a heater film, and a gas sensitive film is formed on the glass film. The MgO content in the glass is kept at 0.1 wt % or under to prevent Mg from eluting into absorbed water at low temperatures and segregating on the cathode by the detection voltage.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: June 2, 1998
    Assignee: Figaro Engineering Inc.
    Inventors: Yoshinobu Matsuura, Toru Nomura, Daisuke Matsuda, Yuki Fujimori, Maki Kitora
  • Patent number: 5708295
    Abstract: In a space surrounded by outer frames formed in the shape of as rectangle is disposed a die pad in the shape of a square for mounting a semiconductor chip having electrodes. Each of the outer frames is connected with a plurality of outer leads respectively continuous with inner leads which are used for electrical connection and extended toward the die pad. Each inner lead is extended to the vicinity of a position where each electrode of the semiconductor chip is to be formed. The corners of the die pad are respectively provided with support members extending to positions away from a dam bar by a predetermined distance. The support members are connected with the inner leads via a square ring-shaped insulating member. Thus, the die pad is supported by the outer frames via the support members. Since there is no need to provide a die pad lead, the space at the corner conventionally occupied by the die pad lead can be utilized for wiring, and the leads can be easily led in.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: January 13, 1998
    Assignee: Matsushita Electronics Corporation
    Inventors: Akira Oga, Yukio Yamaguchi, Toru Nomura, Masanori Minamio
  • Patent number: 5336367
    Abstract: A solid-state imaging device comprises a color filter formed of a colored transparent material having intended spectral transmissivity characteristics. The color filter possesses plural spectral transmissivity characteristics in one layer. In this constitution, the distance from the color filter to the light sensing part is not extended, and flicker and other image characteristic defects are eliminated- Being not of laminate structure, cracks of color filter due to thermal impact are eliminated, and the reliability is enhanced. In the manufacturing method, by dry-etching of the colored transparent material, the solid-state imaging-device having a color filter is realized. Accordingly, the color filter my be formed without exposure accompanied by pattern formation, development and dyeing process, so that an efficient manufacturing method is realized.
    Type: Grant
    Filed: May 24, 1993
    Date of Patent: August 9, 1994
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventor: Toru Nomura
  • Patent number: 5321249
    Abstract: A solid-state imaging device includes a color filter on a substrate formed from a colored transparent material having a pigment with specified spectral transmissivity characteristics. The color filter possesses a plurality of spectral transmissivity characteristics in one layer. The distance from the color filter to the light sensing parts of the substrate is relatively uniform for all of the filter regions. This reduces flicker and other image characteristics defects. Since the device is not a laminate structure, cracks in the color filter due to thermal impact are reduced, and reliability is enhanced.
    Type: Grant
    Filed: June 1, 1992
    Date of Patent: June 14, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toru Nomura