Patents by Inventor Toru Otaki
Toru Otaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7038555Abstract: In a printed wiring board in which wiring patterns for interconnecting a plurality of integrated circuits (ICs) operating with synchronizing signals, in order to make signal transmission times between a plurality of IC's the same, consecutively formed pairs of an inductance pattern and a capacitive pattern, are constructed at each of wiring patterns for interconnecting a plurality of IC's. By changing the shapes of the inductance pattern and the capacitive pattern, it is possible to adjust signal propagation velocities and signal transmission times.Type: GrantFiled: March 31, 2005Date of Patent: May 2, 2006Assignee: Canon Kabushiki KaishaInventors: Toru Otaki, Tatsuo Nishino
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Patent number: 6940362Abstract: In a printed wiring board in which wiring patterns for interconnecting a plurality of integrated circuits (ICs) operating with synchronizing signals, in order to make signal transmission times between a plurality of IC's the same, consecutively formed pairs of an inductance pattern and a capacitive pattern, are constructed at each of wiring patterns for interconnecting a plurality of IC's. By changing the shapes of the inductance pattern and the capacitive pattern, it is possible to adjust signal propagation velocities and signal transmission times.Type: GrantFiled: June 4, 2003Date of Patent: September 6, 2005Assignee: Canon Kabushiki KaishaInventors: Toru Otaki, Tatsuo Nishino
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Publication number: 20050168956Abstract: In a printed wiring board in which wiring patterns for interconnecting a plurality of integrated circuits (ICs) operating with synchronizing signals, in order to make signal transmission times between a plurality of IC's the same, consecutively formed pairs of an inductance pattern and a capacitive pattern, are constructed at each of wiring patterns for interconnecting a plurality of IC's. By changing the shapes of the inductance pattern and the capacitive pattern, it is possible to adjust signal propagation velocities and signal transmission times.Type: ApplicationFiled: March 31, 2005Publication date: August 4, 2005Applicant: Canon Kabushiki KaishaInventors: Toru Otaki, Tatsuo Nishino
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Patent number: 6870094Abstract: An electronic apparatus is provided which causes less radiation noise leakage through an aperture with a shielding box in a compact size. The apparatus has a shielding box encasing a printed circuit board connected to a cable. The shielding box has a cable-regulating portion which seals the aperture of the shielding box for leading out the cable connected to the printed board and presses the cable against the bottom plate of the shielding box. Thereby the radiation noise caused by common-mode current in the cable is also reduced.Type: GrantFiled: March 29, 2004Date of Patent: March 22, 2005Assignee: Canon Kabushiki KaishaInventor: Toru Otaki
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Publication number: 20040198078Abstract: An electronic apparatus is provided which causes less radiation noise leakage through an aperture with a shielding box in a compact size. The apparatus has a shielding box encasing a printed circuit board connected to a cable. The shielding box has a cable-regulating portion which seals the aperture of the shielding box for leading out the cable connected to the printed board and presses the cable against the bottom plate of the shielding box. Thereby the radiation noise caused by common-mode current in the cable is also reduced.Type: ApplicationFiled: March 29, 2004Publication date: October 7, 2004Applicant: Canon Kabushiki KaishaInventor: Toru Otaki
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Publication number: 20030231473Abstract: In a printed wiring board in which wiring patterns for interconnecting a plurality of integrated circuits (ICs) operating with synchronizing signals, in order to make signal transmission times between a plurality of IC's the same, consecutively formed pairs of an inductance pattern and a capacitive pattern, are constructed at each of wiring patterns for interconnecting a plurality of IC's. By changing the shapes of the inductance pattern and the capacitive pattern, it is possible to adjust signal propagation velocities and signal transmission times.Type: ApplicationFiled: June 4, 2003Publication date: December 18, 2003Applicant: Canon Kabushiki KaishaInventors: Toru Otaki, Tatsuo Nishino
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Patent number: 6489574Abstract: A printed wiring board having assembled thereon a grid array type package, a multi-terminal device with many terminals arranged in matrix, is provided, through first signal connection holes, signal lines, and second connection holes, with many numbers of lands divided into plural blocks, being arranged in matrix on a first layer to connect each terminal of the multi-terminal device correspondingly, signal line patterns connected with many lands, and drawn out in the same direction per block, and first signal patterns from lands positioned on the innermost line of many lands. Then, the wiring patterns of the signal lines are drawn out regularly from many lands formed in matrix on the assembling surface of the grid array type package to make it easier for the printed wiring board to effectuate wiring connections without making them complicated or increasing the number of layers of the printed wiring board.Type: GrantFiled: November 1, 2000Date of Patent: December 3, 2002Assignee: Canon Kabushiki KaishaInventors: Toru Otaki, Hideho Inagawa, Toru Osaka
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Patent number: 6215076Abstract: Noise frequency generated from a circuit is determined. The distance between two arbitrary lines of a plurality of power feed lines or a plurality of power return lines extending parallel to each other is determined on the basis of the determined noise frequency in question. The distance between jumper lines for bridging the two arbitrary lines is determined on the basis of the noise frequency, thereby suppressing emitted noise which can be generated on a printed circuit board.Type: GrantFiled: March 26, 1997Date of Patent: April 10, 2001Assignee: Canon Kabushiki KaishaInventors: Hideho Inagawa, Toru Otaki
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Patent number: 5973929Abstract: A circuit board having a printed capacitor whose capacitance is easily adjusted includes a plurality of through-holes arranged in arrays and electrically connected to each other via conductive films. Therefore, first and second electrode portions are arranged to oppose each other, and form a printed capacitor. The capacitance of the capacitor can be adjusted by the number and diameter of through-holes, and the interval between each two adjacent through-holes. Therefore, even when a large-capacitance capacitor is to be formed, the printed capacitor can be rendered compact.Type: GrantFiled: November 19, 1997Date of Patent: October 26, 1999Assignee: Canon Kabushiki KaishaInventors: Tomoyasu Arakawa, Toru Otaki, Yasushi Takeuchi, Hideho Inagawa, Yoshimi Terayama, Tohru Ohsaka
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Patent number: 5912597Abstract: A printed circuit board capable of suppressing radiation noise efficiently includes a first conductive layer where a plurality of power lines are provided at predetermined spacing along one direction, a second conductive layer where a plurality of power lines are provided at predetermined spacing along a direction orthogonal to the one direction, and a plurality of plated through holes for connecting the power lines on the first conductive layer and the power lines on the second conductive layer at the overlapping points of those lines. The power lines contain thin lines and thick lines spaced between a plurality of the thin lines. The predetermined spacing is determined based on a rising time or falling time of the output signal of the IC to be mounted on the circuit board.Type: GrantFiled: March 30, 1995Date of Patent: June 15, 1999Assignee: Canon Kabushiki KaishaInventors: Hideho Inagawa, Tomoyasu Arakawa, Toru Otaki, Yasushi Takeuchi, Yoshimi Terayama, Toru Osaka