Patents by Inventor Toru Shirotori
Toru Shirotori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10379571Abstract: A timing device includes a counter that performs counting action in synchronization with pulses in a clock signal to generate a 6-bit count value representing decimal numbers “0” to “39” in each count cycle in order to perform counting action on a 1/100-second basis and an output control circuit that outputs upper 4 bits of the count value generated by the counter as 4-bit timed data representing time on a 1/1000-second basis.Type: GrantFiled: November 18, 2016Date of Patent: August 13, 2019Assignee: Seiko Epson CorporationInventors: Masayuki Kamiyama, Tsuyoshi Yoneyama, Toru Shirotori
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Patent number: 10135391Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element, a capacitance circuit connected to the oscillating circuit, and capable of correcting an oscillation frequency of the oscillating circuit, a logic circuit to which a signal output from the oscillating circuit is input, and which is capable of correcting a frequency of the signal, and a control circuit adapted to control an operation of the capacitance circuit and an operation of the logic circuit.Type: GrantFiled: August 24, 2016Date of Patent: November 20, 2018Assignee: Seiko Epson CorporationInventors: Toru Shirotori, Hisashi Yamaguchi, Masaki Wakamori, Toshiya Usuda, Masayuki Kamiyama, Sho Matsuzaki, Hiroshi Kiya, Tsuyoshi Yoneyama
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Patent number: 10128854Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element having a frequency-temperature characteristic, and a frequency adjustment circuit having a capacitance circuit connected to the oscillating circuit and adapted to adjust an oscillation frequency of the oscillating circuit, and a logic circuit, to which a signal having been output from the oscillating circuit is input, and which adjusts a frequency of the signal, and the frequency adjustment circuit compensates the frequency-temperature characteristic using at least the capacitance circuit in a predetermined temperature range, and compensates the frequency-temperature characteristic using the logic circuit alone outside the predetermined temperature range.Type: GrantFiled: August 24, 2016Date of Patent: November 13, 2018Assignee: Seiko Epson CorporationInventors: Toru Shirotori, Hisashi Yamaguchi, Masaki Wakamori, Toshiya Usuda, Sho Matsuzaki, Tsuyoshi Yoneyama, Masayuki Kamiyama, Hiroshi Kiya
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Publication number: 20170153661Abstract: A timing device includes a counter that performs counting action in synchronization with pulses in a clock signal to generate a 6-bit count value representing decimal numbers “0” to “39” in each count cycle in order to perform counting action on a 1/100-second basis and an output control circuit that outputs upper 4 bits of the count value generated by the counter as 4-bit timed data representing time on a 1/1000-second basis.Type: ApplicationFiled: November 18, 2016Publication date: June 1, 2017Inventors: Masayuki KAMIYAMA, Tsuyoshi YONEYAMA, Toru SHIROTORI
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Publication number: 20170063380Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element having a frequency-temperature characteristic, and a frequency adjustment circuit having a capacitance circuit connected to the oscillating circuit and adapted to adjust an oscillation frequency of the oscillating circuit, and a logic circuit, to which a signal having been output from the oscillating circuit is input, and which adjusts a frequency of the signal, and the frequency adjustment circuit compensates the frequency-temperature characteristic using at least the capacitance circuit in a predetermined temperature range, and compensates the frequency-temperature characteristic using the logic circuit alone outside the predetermined temperature range.Type: ApplicationFiled: August 24, 2016Publication date: March 2, 2017Inventors: Toru SHIROTORI, Hisashi YAMAGUCHI, Masaki WAKAMORI, Toshiya USUDA, Sho MATSUZAKI, Tsuyoshi YONEYAMA, Masayuki KAMIYAMA, Hiroshi KIYA
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Publication number: 20170063305Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element, a capacitance circuit connected to the oscillating circuit, and capable of correcting an oscillation frequency of the oscillating circuit, a logic circuit to which a signal output from the oscillating circuit is input, and which is capable of correcting a frequency of the signal, and a control circuit adapted to control an operation of the capacitance circuit and an operation of the logic circuit.Type: ApplicationFiled: August 24, 2016Publication date: March 2, 2017Inventors: Toru SHIROTORI, Hisashi YAMAGUCHI, Masaki WAKAMORI, Toshiya USUDA, Masayuki KAMIYAMA, Sho MATSUZAKI, Hiroshi KIYA, Tsuyoshi YONEYAMA
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Patent number: 9075396Abstract: A timer device includes a RES input terminal (first external terminal), an input time determination circuit that determines the time length relationship between an input time of a predetermined signal input to the RES input terminal and a given determination time, and a pre-settable down counter (counting circuit) that counts a given set value. The pre-settable down counter changes a process according to a determination result of the input time determination circuit.Type: GrantFiled: November 30, 2012Date of Patent: July 7, 2015Assignee: SEIKO EPSON CORPORATIONInventors: Makoto Takemura, Toru Shirotori
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Patent number: 8824623Abstract: A timer device includes a RES input terminal, an OUT output terminal, a delay circuit that delays a signal input to the RES input terminal, and a pre-settable down counter that counts a given set value, and outputs a measurement completion signal via an output terminal when the counting of the set value is completed. When a predetermined signal is input to an input terminal after an output of the measurement completion signal, the pre-settable down counter completes the output of the measurement completion signal based on a delay signal obtained by the delaying the predetermined signal using the delay circuit.Type: GrantFiled: November 30, 2012Date of Patent: September 2, 2014Assignee: Seiko Epson CorporationInventors: Makoto Takemura, Toru Shirotori
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Patent number: 8458506Abstract: A real time clock for outputting data indicating a time of day includes: an event detection circuit for detecting that an event detection signal has been inputted from outside; a timing circuit for generating the time-of-day data according to a signal outputted from an oscillator circuit; a memory; and a control circuit for, if the event detection circuit detects input of the event detection signal, recording event data in the memory, the event data including additional data indicating an operating state of the real time clock and the time-of-day data generated by the timing circuit.Type: GrantFiled: March 2, 2012Date of Patent: June 4, 2013Assignee: Seiko Epson CorporationInventors: Toru Shirotori, Toshiya Usuda
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Publication number: 20120166138Abstract: A real time clock for outputting data indicating a time of day includes: an event detection circuit for detecting that an event detection signal has been inputted from outside; a timing circuit for generating the time-of-day data according to a signal outputted from an oscillator circuit; a memory; and a control circuit for, if the event detection circuit detects input of the event detection signal, recording event data in the memory, the event data including additional data indicating an operating state of the real time clock and the time-of-day data generated by the timing circuit.Type: ApplicationFiled: March 2, 2012Publication date: June 28, 2012Applicant: SEIKO EPSON CORPORATIONInventors: Toru SHIROTORI, Toshiya Usuda
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Patent number: 8209561Abstract: A real time clock for outputting data indicating a time of day includes: an event detection circuit for detecting that an event detection signal has been inputted from outside; a timing circuit for generating the time-of-day data according to a signal outputted from an oscillator circuit; a memory; and a control circuit for, if the event detection circuit detects input of the event detection signal, recording event data in the memory, the event data including additional data indicating an operating state of the real time clock and the time-of-day data generated by the timing circuit.Type: GrantFiled: July 17, 2008Date of Patent: June 26, 2012Assignee: Seiko Epson CorporationInventors: Toru Shirotori, Toshiya Usuda
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Publication number: 20090022013Abstract: A real time clock for outputting data indicating a time of day includes: an event detection circuit for detecting that an event detection signal has been inputted from outside; a timing circuit for generating the time-of-day data according to a signal outputted from an oscillator circuit; a memory; and a control circuit for, if the event detection circuit detects input of the event detection signal, recording event data in the memory, the event data including additional data indicating an operating state of the real time clock and the time-of-day data generated by the timing circuit.Type: ApplicationFiled: July 17, 2008Publication date: January 22, 2009Applicant: EPSON TOYOCOM CORPORATIONInventors: Toru SHIROTORI, Toshiya USUDA
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Patent number: 7418614Abstract: An external signal detection circuit includes an input port, to which a first end of a circuit including a pull-up resistor connected in series with a first switch portion is connected, the input port receiving an input of an external signal; an input detection portion connected to the input port for receiving an input of the external signal and an input of an input detection signal that sets a timing for intermittently detecting the input of the external signal; and a connection control portion turning on the first switch portion in time with the timing at which the external signal is detected.Type: GrantFiled: July 5, 2006Date of Patent: August 26, 2008Assignee: Seiko Epson CorporationInventor: Toru Shirotori
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Patent number: 7242260Abstract: A given length of an input signal can be detected with small power consumption. A real time clock apparatus has an oscillating module which outputs an original oscillating clock signal having a predetermined frequency, a plurality of dividing modules which divides the original oscillating clock signal outputted from the oscillating module to generate clock signals having a period different from each other, a clock selecting circuit which outputs a clock signal having a given period outputted from the dividing module based on the supplied selection signal, and a signal detecting circuit which is connected to an external switch and which detects a length of an inputted signal by a clock signal outputted from the clock selecting circuit and senses whether the inputted signal is an input signal from the switch.Type: GrantFiled: December 6, 2005Date of Patent: July 10, 2007Assignee: Seiko Epson CorporationInventor: Toru Shirotori
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Publication number: 20070029980Abstract: An external signal detection circuit includes an input port, to which a first end of a circuit including a pull-up resistor connected in series with a first switch portion is connected, the input port receiving an input of an external signal; an input detection portion connected to the input port for receiving an input of the external signal and an input of an input detection signal that sets a timing for intermittently detecting the input of the external signal; and a connection control portion turning on the first switch portion in time with the timing at which the external signal is detected.Type: ApplicationFiled: July 5, 2006Publication date: February 8, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Toru SHIROTORI
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Publication number: 20060164177Abstract: A signal-selecting circuit applicable to low-active and high-active electronic circuits has a pull-up circuit and a pull-down circuit with one end of each connected to an input port. The pull-up circuit includes a first resistor and a first switch circuit connected serially. The remaining end of the pull-up circuit is connected to a power source. The pull-down circuit includes a second resistor and a second switch circuit connected serially. The remaining end of the pull-down circuit is connected to ground. The first switch circuit and second switch circuit are connected to a selecting part. The selecting part turns on-either the first switch circuit or the second switch circuit to fix the potential of the input port at a High state or a Low state according to an input selecting signal.Type: ApplicationFiled: December 15, 2005Publication date: July 27, 2006Inventor: Toru Shirotori
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Publication number: 20060158272Abstract: A given length of an input signal can be detected with small power consumption. A real time clock apparatus has an oscillating module which outputs an original oscillating clock signal having a predetermined frequency, a plurality of dividing modules which divides the original oscillating clock signal outputted from the oscillating module to generate clock signals having a period different from each other, a clock selecting circuit which outputs a clock signal having a given period outputted from the dividing module based on the supplied selection signal, and a signal detecting circuit which is connected to an external switch and which detects a length of an inputted signal by a clock signal outputted from the clock selecting circuit and senses whether the inputted signal is an input signal from the switch.Type: ApplicationFiled: December 6, 2005Publication date: July 20, 2006Inventor: Toru Shirotori