Patents by Inventor Toru Takai
Toru Takai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10583405Abstract: The present invention provides a RO membrane or a FO membrane comprising a coating layer made of a phospholipid bilayer membrane and formed on a surface of a porous membrane body, having a high water permeate flow rate and salt rejection performance, the membrane being a permselective membrane comprising a porous membrane having a pore size of 5 nm to 50 nm and a coating layer made of a phospholipid bilayer and formed on a surface of the porous membrane, wherein (i) the phospholipid bilayer comprises phospholipid, amphotericin B, and ergosterol; (ii) a content of the amphotericin B is 3 to 20 mol % based on the phospholipid bilayer; (iii) a total content of the ergosterol and the amphotericin B in the phospholipid bilayer is 10 to 30 mol %.Type: GrantFiled: March 3, 2017Date of Patent: March 10, 2020Assignees: KURITA WATER INDUSTRIES LTD., NATIONAL UNIVERSITY CORPORATION KOBE UNIVERSITYInventors: Takahiro Kawakatsu, Hideto Matsuyama, Daisuke Saeki, Toru Takai
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Publication number: 20190046933Abstract: The present invention provides a RO membrane or a FO membrane comprising a coating layer made of a phospholipid bilayer membrane and formed on a surface of a porous membrane body, having a high water permeate flow rate and salt rejection performance, the membrane being a permselective membrane comprising a porous membrane having a pore size of 5 nm to 50 nm and a coating layer made of a phospholipid bilayer and formed on a surface of the porous membrane, wherein (i) the phospholipid bilayer comprises phospholipid, amphotericin B, and ergosterol; (ii) a content of the amphotericin B is 3 to 20 mol % based on the phospholipid bilayer; (iii) a total content of the ergosterol and the amphotericin B in the phospholipid bilayer is 10 to 30 mol %.Type: ApplicationFiled: March 3, 2017Publication date: February 14, 2019Applicants: Kurita Water Industries Ltd., National University Corporation Kobe UniversityInventors: Takahiro KAWAKATSU, Hideto MATSUYAMA, Daisuke SAEKI, Toru TAKAI
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Publication number: 20170253948Abstract: A method for upgrading an ilmenite ore for yielding a high-TiO2-content titanium source by separating and removing an iron component from ilmenite (FeTiO3), which includes an oxidation step of oxidizing a starting ilmenite; after the oxidation step, a reduction step of reducing the treated ilmenite; and after the reduction step, an extraction step of dissolving the iron component with an acid, to thereby remove the iron component. Also disclosed is a production method for producing a high-TiO2-content titanium source, which includes upgrading an ilmenite ore as described above, and a high-TiO2-content titanium source produced through the production method.Type: ApplicationFiled: February 17, 2017Publication date: September 7, 2017Applicant: TOHOKU UNIVERSITYInventors: Tetsuya NAGASAKA, Yoshihiro ITO, Katsuyuki IIJIMA, Eiichiro YOSHIKAWA, Toru TAKAI, Nobuo NAKAMURA
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Patent number: 8703314Abstract: A prismatic battery includes an electrode assembly including: a positive electrode including a belt-shaped positive electrode core member and a positive electrode active material layer formed on both surfaces thereof; a negative electrode including a belt-shaped negative electrode core member and a negative electrode active material layer formed on both surfaces thereof; and a belt-shaped separator. The electrode assembly is formed by winding the positive electrode, the negative electrode, and the separator in the longitudinal directions thereof. The negative electrode has, in an end portion thereof from which winding is started, a one-sided active material layer portion in which the negative electrode active material layer is provided only on one surface of the negative core member. The one-sided active material layer portion terminates at a predetermined position between positions at which the negative electrode is folded for the second time and for the third time.Type: GrantFiled: March 5, 2010Date of Patent: April 22, 2014Assignee: Panasonic CorporationInventors: Takaharu Morikawa, Toru Takai
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Publication number: 20120058373Abstract: A prismatic battery 1 includes an electrode assembly 10 including: a positive electrode 12 including a belt-like positive electrode core member 12a and a positive electrode active material layer 12b formed on both surfaces thereof; a negative electrode 14 including a belt-like negative electrode core member 14a and a negative electrode active material layer 14b formed on both surfaces thereof; and a belt-like separator 16. The electrode assembly is formed by winding the positive electrode, the negative electrode, and the separator in the longitudinal directions thereof. The negative electrode has, in an end portion thereof from which winding is started, a one-sided active material layer portion in which the negative electrode active material layer is provided only on one surface of the negative core member. The one-sided active material layer portion terminates at a predetermined position between positions at which the negative electrode is folded for the second time and for the third time.Type: ApplicationFiled: March 5, 2010Publication date: March 8, 2012Inventors: Takaharu Morikawa, Toru Takai
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Patent number: 7928981Abstract: Instinctive operation of editing parameters of waveform is provided. Tabs 38, 40 and 42 are displayed on a display screen 14 to show existence of parameter edit screen layers of different combinations of characters, waveforms and channels. If one of the tabs are selected the display is switched to show the corresponding parameter edit screen layer. Channel characters or waveforms are displayed on the tabs 38, 40 and 42 and are changed dynamically according to the setting so that a user can easily realize setting outlines of the respective channels at a glance.Type: GrantFiled: April 20, 2006Date of Patent: April 19, 2011Assignee: Tektronix International Sales GmbHInventors: Toshio Sugiyama, Susan C. Adam, Hiroshi Komatsu, Kazumasa Ito, Takayuki Hayase, Toru Takai
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Publication number: 20080283229Abstract: A heat exchanger comprises outer fins; a plurality of tubes arranged alternately with the outer fins; and header tanks receiving open ends of the tubes for communication with the tubes. The header tanks each comprise a first member and a second member which are combined to each other. The first member has tube insertion slots into which the open ends of the tubes are inserted, the second member does not have the tube insertion slots. The first member is either a core material having no brazing material layers on outer and inner peripheral surfaces thereof, or a core material having a brazing material layer on an outer peripheral surface thereof but having no brazing material layer on an inner peripheral surface thereof. The second member is brazed to the outer or inner peripheral surface of the first member having no brazing material layer thereon.Type: ApplicationFiled: July 21, 2008Publication date: November 20, 2008Inventors: Toru TAKAI, Koichi Iwasaka, Hiroyuki Tamura, Minoru Tsuchiya, Takumi Funatsu, Tsutomu Kawada
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Publication number: 20070135946Abstract: An electronic instrument displays commands and arguments and their description related to specific user operations of an electronic instrument. A command help bar is displayed in a window with the command help bar displaying a command and associated argument and a description of the command and argument as a function of user defined operations of the electronic instrument using operation means. The user entered value is used as the argument, which allows the user to easily understand a specific description. The user may access additional help windows that displays information on a detailed explanation of the description method (syntax) of the displayed command and a programming example. The description of the command and argument including the specific setting value may be copied and pasted into a program file in a programming widow that is displayed at the same time, which enhances programming efficiency.Type: ApplicationFiled: November 22, 2006Publication date: June 14, 2007Inventors: Toshio Sugiyama, Toru Takai
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Publication number: 20070115257Abstract: A signal generator displays signal patterns according to a sequence and displays a current output or waiting signal pattern distinctively from other signal patterns after the start of signal output operation. Identifiers such as index numbers may be related to the respective signal patterns and displayed. The identifier of the current output or waiting signal pattern is blinked to distinguish the signal pattern from other signal patterns. Alternately, the color of the current output or waiting signal pattern may be reversed or highlighted to easily identify the signal pattern from the other signal patterns.Type: ApplicationFiled: November 17, 2006Publication date: May 24, 2007Inventors: Toshio Sugiyama, Toru Takai
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Patent number: 7215168Abstract: A pulse delay circuit induces lager jitter to faster input reference pulse trains than before. A buffer receives a reference pulse train and provides non-inverted and inverted pulses. Low pass filters (LPF) and comparators receive the non-inverted and inverted pulses from the buffer and provide pulses having delayed leading and trailing edges. Dividers divide the delayed pulses by 2 to produce the respective pulse trains having a half frequency. An XOR gate produces an exclusive OR of the delayed and divided pulse trains to provide a pulse train having delayed leading and/or trailing edges relative to the reference pulse train. If the delays by the LPFs and comparators are changed, the output pulses from the XOR gate have jitter.Type: GrantFiled: September 20, 2005Date of Patent: May 8, 2007Assignee: Tektronix International Sales GmbHInventors: Hisao Takahashi, Toru Takai
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Patent number: 7148733Abstract: Delays induced to leading and trailing edges of an input pulse train are updated faster than before. First and second delay paths receive delay data for inducing delays to leading edges and/or trailing edges of an input pulse train. An OR circuit combines the outputs of the delay paths. First and second gates receive the input pulse train and selectively provide the input pulse train to the first and second delay paths independent of the edge position of the input pulse train. A delay time setup circuit generates a CTRL signal for controlling the first and second gates and the loading of the delay data to the first and second delay path. The CTRL signal causes the gates to selectively switch the input pulse train from one delay path to another while the delay data is selectively loaded in the delay path not receiving the input pulse train.Type: GrantFiled: July 19, 2005Date of Patent: December 12, 2006Assignee: Tektronix International Sales GmbHInventor: Toru Takai
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Publication number: 20060250530Abstract: Instinctive operation of editing parameters of waveform is provided. Tabs 38, 40 and 42 are displayed on a display screen 14 to show existence of parameter edit screen layers of different combinations of characters, waveforms and channels. If one of the tabs are selected the display is switched to show the corresponding parameter edit screen layer. Channel characters or waveforms are displayed on the tabs 38, 40 and 42 and are changed dynamically according to the setting so that a user can easily realize setting outlines of the respective channels at a glance.Type: ApplicationFiled: April 20, 2006Publication date: November 9, 2006Inventors: Toshio Sugiyama, Susan Adam, Hiroshi Komatsu, Kazumasa Ito, Takayuki Hayase, Toru Takai
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Publication number: 20060108096Abstract: A joint structure of a header tank and a connector in a heat exchanger includes a header tank (1) including a plate wall (1c) formed with a first communication hole (1a). The joint structure includes a block-shaped connector (2) having a second communication hole (2b) positioned to the first communication hole (1a) and joined to the header tank (1). The first communication hole (1a) is smaller than the second communication hole (2b). The first communication hole (1a) has therearound a periphery (1b) caulked and fixed on an inner peripheral surface of the second communication hole (2a) by burring formation.Type: ApplicationFiled: October 18, 2005Publication date: May 25, 2006Inventors: Minoru Tsuchiya, Toru Takai, Koichi Iwasaka, Hiroyuki Tamura, Takumi Funatsu
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Publication number: 20060066371Abstract: A pulse delay circuit induces lager jitter to faster input reference pulse trains than before. A buffer receives a reference pulse train and provides non-inverted and inverted pulses. Low pass filters (LPF) and comparators receive the non-inverted and inverted pulses from the buffer and provide pulses having delayed leading and trailing edges. Dividers divide the delayed pulses by 2 to produce the respective pulse trains having a half frequency. An XOR gate produces an exclusive OR of the delayed and divided pulse trains to provide a pulse train having delayed leading and/or trailing edges relative to the reference pulse train. If the delays by the LPFs and comparators are changed, the output pulses from the XOR gate have jitter.Type: ApplicationFiled: September 20, 2005Publication date: March 30, 2006Inventors: Hisao Takahashi, Toru Takai
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Patent number: 6998893Abstract: A jitter inducing circuit receives a reference pulse train and induces desired amounts of jitter to the rising and/or falling edges of the pulses. First and second delay blocks 16 and 18 alternately delay the selected edge or edges of the provided reference pulse train interval by preset delay times for every interval. A signal composer 46 composes the outputs of the first and second delay blocks 16 and 18. A delay time setup circuit controls the delay times of the delay blocks 16 and 18. The delay times may change for each interval as a function of time so as to trace a desired function such as a sinusoidal or triangular function.Type: GrantFiled: December 1, 2003Date of Patent: February 14, 2006Assignee: Tektronix International Sales GmbHInventors: Hisao Takahashi, Fujihiko Omiya, Hideaki Okuda, Ryoichi Sakai, Toru Takai
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Publication number: 20060017485Abstract: Delays induced to leading and trailing edges of an input pulse train are updated faster than before. First and second delay paths receive delay data for inducing delays to leading edges and/or trailing edges of an input pulse train. An OR circuit combines the outputs of the delay paths. First and second gates receive the input pulse train and selectively provide the input pulse train to the first and second delay paths independent of the edge position of the input pulse train. A delay time setup circuit generates a CTRL signal for controlling the first and second gates and the loading of the delay data to the first and second delay path. The CTRL signal causes the gates to selectively switch the input pulse train from one delay path to another while the delay data is selectively loaded in the delay path not receiving the input pulse train.Type: ApplicationFiled: July 19, 2005Publication date: January 26, 2006Inventor: Toru Takai
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Publication number: 20050173100Abstract: A heat exchanger comprises outer fins; a plurality of tubes arranged alternately with the outer fins; and header tanks receiving open ends of the tubes for communication with the tubes. The header tanks each comprise a first member and a second member which are combined to each other. The first member has tube insertion slots into which the open ends of the tubes are inserted, the second member does not have the tube insertion slots. The first member is either a core material having no brazing material layers on outer and inner peripheral surfaces thereof, or a core material having a brazing material layer on an outer peripheral surface thereof but having no brazing material layer on an inner peripheral surface thereof. The second member is brazed to the outer or inner peripheral surface of the first member having no brazing material layer thereon.Type: ApplicationFiled: January 19, 2005Publication date: August 11, 2005Inventors: Toru Takai, Koichi Iwasaka, Hiroyuki Tamura, Minoru Tsuchiya, Takumi Funatsu, Tsutomu Kawada
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Publication number: 20040135606Abstract: A jitter inducing circuit receives a reference pulse train and induces desired amounts of jitter to the rising and/or falling edges of the pulses. First and second delay blocks 16 and 18 alternately delay the selected edge or edges of the provided reference pulse train interval by preset delay times for every interval. A signal composer 46 composes the outputs of the first and second delay blocks 16 and 18. A delay time setup circuit controls the delay times of the delay blocks 16 and 18. The delay times may change for each interval as a function of time so as to trace a desired function such as a sinusoidal or triangular function.Type: ApplicationFiled: December 1, 2003Publication date: July 15, 2004Inventors: Hisao Takahashi, Fujihiko Omiya, Hideaki Okuda, Ryoichi Sakai, Toru Takai
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Patent number: 6234238Abstract: Tanks are respectively structured such that seat plates are combined with tank main bodies, and the two end openings thereof are respectively closed by end plates. The direction in which the end plates are combined with the seat plate and tank main body is defined in an only-one-meaning manner in accordance with the engagement between engagement projecting pieces and engagement holes. The seat plates and end plate are respectively clad members structured such that brazing material is cladded only on the outer surface side of the tanks.Type: GrantFiled: April 21, 2000Date of Patent: May 22, 2001Assignee: Calsonic Kansei CorporationInventors: Sachio Koyama, Toru Takai
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Patent number: 5958617Abstract: To enhance the safety of battery, in a thin type battery, by securely cutting off electric connection when the internal pressure of the battery is raised.An upper valve disc and a lower valve disc are disposed through an electric insulating gasket, a part of the upper valve disc is formed in a recess shape, and a tiny hole and a continuous thin wall part are formed in a part of the lower valve disc, and the bottom of the recess part of the upper valve disc and the portion enclosed by the tiny hole and thin wall part of the lower valve disc are fused, and the structure is constituted so that the strength of the lower valve disc may be greater than the strength of the upper valve disc.Type: GrantFiled: December 10, 1997Date of Patent: September 28, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyomi Kozuki, Yoshiko Nishimura, Rikio Iida, Takabumi Fujii, Kazuo Saito, Naoto Kunoike, Toru Takai, Kenjin Masumoto, Yukimasa Niwa