Abstract: A semiconductor device of trench gate type is provided that has achieved both large on-current and high off-state breakdown voltage. Around trench T and between it and electric field relaxation p-layer 16, low resistance n-layer 17 is provided. Low resistance n-layer 17 is formed deeper than trench T, and shallower than electric field relaxation p-layer 16, being connected to n?-layer (drift layer) 12 just thereunder, and thus low resistance n-layer 17 and n?-layer 12 are integrated to form a drift layer. Although low resistance n-layer 17 is n-type as is n?-layer 12, donor concentration thereof is set higher than that of n?-layer 12, thereby low resistance n-layer 17 having a resistivity lower than that of n?-layer 12. This low resistance n-layer 17 is provided in on-current path (between electric field relaxation p-layer 16 and trench T), whereby low resistance n-layer 17 can lower the resistance to on-current.

Abstract: A semiconductor device includes an n-type semiconductor substrate, which has a main surface having an element region and an outer peripheral region surrounding the element region; a p-type guard ring, which includes: a lowly-doped p-type region disposed on an upper surface of the semiconductor substrate in the outer peripheral region surrounding the element region; and a highly-doped p-type region disposed on an inner side of the lowly-doped p-type region and having an impurity concentration higher than an impurity concentration of the lowly-doped p-type region, wherein a side surface and a bottom surface of the highly-doped p-type region are covered by the lowly-doped p-type region such that the highly-doped p-type region is not in contact with the n-type region; and an ohmic junction electrode, which forms an ohmic junction with the highly-doped p-type region.

Abstract: A semiconductor device includes: a gate oxide film formed on a surface of a semiconductor substrate; a gate electrode formed on the gate oxide film; and a high concentration impurity layer connected to a main electrode and formed on the surface of the semiconductor substrate, wherein an impurity species doped in the high concentration impurity layer comprises a first impurity species of phosphorous and a second impurity species of at least one of argon and nitrogen, a concentration of the second impurity species is higher than a concentration of the first impurity species in a surface of the high concentration impurity layer, and a peak position of a concentration distribution of the first impurity species in a depth direction in the high concentration impurity layer is deeper than a peak position of a concentration distribution of the second impurity species in the depth direction.

Abstract: A semiconductor device includes a semiconductor substrate, a surface of which is provided with: a source region having a first conductivity type is formed in a body region having a second conductivity type opposite to the first conductivity type; a main electrode connected to the source region and the body region; and a gate electrode, to which a voltage for controlling a current flowing through the main electrode is applied, and the semiconductor device includes: a recess formed in the surface of the semiconductor substrate, wherein the source region is exposed on an inner surface of the recess and the main electrode is connected to the source region at the inner surface of the recess.

Abstract: A semiconductor device includes a semiconductor substrate, a surface of which is provided with: a source region having a first conductivity type is formed in a body region having a second conductivity type opposite to the first conductivity type; a main electrode connected to the source region and the body region; and a gate electrode, to which a voltage for controlling a current flowing through the main electrode is applied, and the semiconductor device includes: a recess formed in the surface of the semiconductor substrate, wherein the source region is exposed on an inner surface of the recess and the main electrode is connected to the source region at the inner surface of the recess.

Abstract: A semiconductor device having a main electrode connected to a first semiconductor region and a second semiconductor layer on a semiconductor substrate so that a pn-junction diode is formed with the first semiconductor region being interposed and a Schottky barrier diode is formed with the second semiconductor layer being interposed on a surface of the semiconductor substrate, the semiconductor device includes a first electrode configured to ohmic-contact the first semiconductor region; a second electrode configured to Schottky-contact the second semiconductor layer and not having a portion directly contacting the first electrode; and a conductive reaction suppression layer to suppress a reaction between a material configuring the first electrode and a material configuring the second electrode are provided on the surface of the semiconductor substrate, and the main electrode is electrically connected to the first electrode and the second electrode.

Abstract: A method of manufacturing a semiconductor device includes: forming a gate electrode material layer made of a material configuring a gate electrode and a barrier material layer made of a silicon nitride film; forming an upper barrier layer configured to an upper surface of the gate electrode with the barrier material layer and forming the gate electrode from the gate electrode material later by etching the barrier material layer and the gate electrode material layer with a same mask pattern; forming a sidewall barrier layer configured to cover a side surface of the gate electrode by forming again the barrier material layer after the forming of the gate electrode; forming an interlayer insulation layer configured to cover a surface-side of the semiconductor substrate including the upper surface barrier layer and the sidewall barrier layer; and opening the interlayer insulation layer and forming the silicide electrode.

Abstract: A semiconductor device having a main electrode connected to a first semiconductor region and a second semiconductor layer on a semiconductor substrate so that a pn-junction diode is formed with the first semiconductor region being interposed and a Schottky barrier diode is formed with the second semiconductor layer being interposed on a surface of the semiconductor substrate, the semiconductor device includes a first electrode configured to ohmic-contact the first semiconductor region; a second electrode configured to Schottky-contact the second semiconductor layer and not having a portion directly contacting the first electrode; and a conductive reaction suppression layer to suppress a reaction between a material configuring the first electrode and a material configuring the second electrode are provided on the surface of the semiconductor substrate, and the main electrode is electrically connected to the first electrode and the second electrode.

Abstract: A semiconductor device includes a semiconductor substrate, a surface of which is provided with: a source region having a first conductivity type is formed in a body region having a second conductivity type opposite to the first conductivity type; a main electrode connected to the source region and the body region; and a gate electrode, to which a voltage for controlling a current flowing through the main electrode is applied, and the semiconductor device includes: a recess formed in the surface of the semiconductor substrate, wherein the source region is exposed on an inner surface of the recess and the main electrode is connected to the source region at the inner surface of the recess.

Abstract: A semiconductor device includes: a gate oxide film formed on a surface of a semiconductor substrate; a gate electrode formed on the gate oxide film; and a high concentration impurity layer connected to a main electrode and formed on the surface of the semiconductor substrate, wherein an impurity species doped in the high concentration impurity layer comprises a first impurity species of phosphorous and a second impurity species of at least one of argon and nitrogen, a concentration of the second impurity species is higher than a concentration of the first impurity species in a surface of the high concentration impurity layer, and a peak position of a concentration distribution of the first impurity species in a depth direction in the high concentration impurity layer is deeper than a peak position of a concentration distribution of the second impurity species in the depth direction.

Abstract: It, as shown in FIG. 11, is provided with a feed roller 31 that is movable, rotates the spiral coil 11 passing through punched holes 3a of the bundle of paper-sheets 3, and guides the spiral coil 11 to feed it toward a coil advance direction, a screw guide 49 at a movable and adjustable side that guides and conducts a forward end of the spiral coil 11 fed by the feed roller 31 toward the coil advance direction into the punched holes 3a thereof, and a control part that receives diameter-of-coil-setting information for setting a diameter of a coil of the spiral coil 11 and controls positions of the feed roller 31 and the screw guide 49 based on the diameter-of-coil-setting information. Such a configuration enables the feed roller 31 and the screw guide 49 to move to the guided positions of the spiral coil 11 indicated by the diameter-of-coil-setting information. Accordingly, it is possible to pass the spiral coils having the different diameters thereof through the holes of the bundle of paper-sheets stably.

Abstract: A silicon carbide semiconductor device is fabricated by forming an amorphous layer in a semiconductor layer of a silicon carbide substrate at a boundary between a cell forming area and an outer peripheral area, forming an outer peripheral insulating film over the semiconductor layer in the outer peripheral area, and thermally oxidizing an upper surface of the semiconductor layer in the cell forming area and at least a portion of the amorphous layer exposed by the outer peripheral insulating film to form a gate oxide film including a stepped portion of increased thickness adjacent the outer peripheral insulating film. The gate electrode layer is then formed which extends from the gate oxide film to above the outer peripheral insulating film.

Abstract: A sheet hold flap 18 is arranged on an upper side of a vicinity of a rear end portion of a sheet table 7 to which a sheet is continuously supplied from a copier or the like. The sheet hold flap is switched to an upper initial position and a sheet holding position by a solenoid 17. There is carried out a control of holding a rear end portion of a sheet P by driving the sheet hold flap to the sheet holding position after taking in a sheet to the sheet table and returning the sheet hold flap to the initial position to escape from a sheet path in taking in a successive sheet. Sheet jamming by floating up the sheet is prevented by holding a sheet on the sheet table until immediately before taking in the successive sheet.

Abstract: A supporting base, including a supporting plate and holders, holds a sapphire substrate so that one substrate surface faces a hot plate and the other substrate surface faces a radiant heat absorbing plate mounted on the supporting plate. Radiant heat from the hot plate passes through the sapphire substrate and heats the radiant heat absorbing plate. The sapphire substrate is heated from both sides by air warmed by the hot plate and radiant heat absorbing plate, and therefore does not warp. When the temperature of the sapphire substrate has reached the necessary level, the supporting base delivers the sapphire substrate to the surface of the hot plate, then moves away while the sapphire substrate is held against the hot plate and a semiconductor fabrication process is carried out on the sapphire substrate.

Abstract: A binder cartridge (51) that can accommodate a large number of binders (61) , which are connected in parallel to each other by an engaging mechanism. A right angle crank-shaped guide groove (55) is formed in a gate portion (54) at the front end of the binder cartridge. A binder in the front row of the binder cartridge is moved by a binder lateral movement mechanism (7) along the crank-shaped guide groove in the lateral direction and is separated from the other binders. A pair of upper and lower pushers (12, 13) of a bind mechanism portion (5) pinch division ring portions of the binder in the vertical direction and insert the division ring portions into a punch hole formed on the sheets of paper.

Abstract: A positional relation between the position of the positioning plate 22 for conducting reference-positioning on sheets of paper, which are fed onto the sheet table of the bind processing device, and the position of the division ring binder held by the binding mechanism section is set to be the same as a positional relation between the sides of the sheets of paper P and the punch holes. Forward end portions of the sheets of paper are pushed onto the sheet forward end position regulating plate 19, and the movable positioning plate 23 comes close to the reference positioning plate 22 and conducts positioning on the sheets of paper in a direction perpendicular to the sheet conveyance direction so as to arrange the positions of the sheets of paper. In this laminated state, the sheets of paper are sent to the binding mechanism section and attached with a binder.

Abstract: There is provided a sensor 48 for detecting penetration of a sheet by a punch hole aligning pin 42, and there is provided controlling means for retrying a penetrating operation by returning the punch hole aligning pin to an initial position when a time period from starting to move the pin to penetrating the sheet exceeds a reference time period. Even when a degree of unalignment of the punch hole of the sheet P is considerable and the punch hole aligning pin cannot penetrate through the sheet by once, the punch hole aligning pin is penetrated therethrough frequently by repeating the penetrating operation and therefore, an error in aligning the sheet can be reduced. In a case in which the pin is not penetrated through the sheet even when the penetrating operation is carried out by a predetermined number of times, the pin is returned to the initial position and an error is displayed.

Abstract: A binder cartridge (51) that can accommodate a large number of binders (61), which are connected in parallel to each other by an engaging mechanism. A right angle crank-shaped guide groove (55) is formed in a gate portion (54) at the front end of the binder cartridge. A binder in the front row of the binder cartridge is moved by a binder lateral movement mechanism (7) along the crank-shaped guide groove in the lateral direction and is separated from the other binders. A pair of upper and lower pushers (12, 13) of a bind mechanism portion (5) pinch division ring portions of the binder in the vertical direction and insert the division ring portions into a punch hole formed on the sheets of paper.

Abstract: A binder cartridge (51) that can accommodate a large number of binders (61) , which are connected in parallel to each other by an engaging mechanism. A right angle crank-shaped guide groove (55) is formed in a gate portion (54) at the front end of the binder cartridge. A binder in the front row of the binder cartridge is moved by a binder lateral movement mechanism (7) along the crank-shaped guide groove in the lateral direction and is separated from the other binders. A pair of upper and lower pushers (12, 13) of a bind mechanism portion (5) pinch division ring portions of the binder in the vertical direction and insert the division ring portions into a punch hole formed on the sheets of paper.

Abstract: A silicon carbide semiconductor device is fabricated by forming an amorphous layer in a semiconductor layer of a silicon carbide substrate at a boundary between a cell forming area and an outer peripheral area, forming an outer peripheral insulating film over the semiconductor layer in the outer peripheral area, and thermally oxidizing an upper surface of the semiconductor layer in the cell forming area and at least a portion of the amorphous layer exposed by the outer peripheral insulating film to form a gate oxide film including a stepped portion of increased thickness adjacent the outer peripheral insulating film. The gate electrode layer is then formed which extends from the gate oxide film to above the outer peripheral insulating film.