Patents by Inventor Toru Yoshioka

Toru Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948864
    Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: April 2, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Toru Sugiyama, Hitoshi Kobayashi
  • Publication number: 20240105826
    Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first electrode film provided on the first insulating film, a second electrode film provided on the first electrode film, and a first field plate electrode provided on the second electrode film. A lower end of the first field plate electrode is located on a second surface of the first electrode film, the second surface being in contact with the second electrode film, rather than a first surface of the first electrode film, the first surface being in contact with the first insulating film.
    Type: Application
    Filed: March 1, 2023
    Publication date: March 28, 2024
    Inventors: Hitoshi KOBAYASHI, Masaaki ONOMURA, Toru SUGIYAMA, Akira YOSHIOKA, Hung HUNG, Hideki SEKIGUCHI, Tetsuya OHNO, Yasuhiro ISOBE
  • Publication number: 20240105563
    Abstract: A semiconductor device includes a nitride semiconductor element, a first diode, and a second diode; the nitride semiconductor element includes a conductive mounting bed, a semiconductor substrate formed on the mounting bed, a first nitride semiconductor layer, a second nitride semiconductor layer, a first major electrode, a second major electrode, a first gate electrode, and a second gate electrode; the first diode includes a first anode electrode electrically connected to the mounting bed, and a first cathode electrode electrically connected to the first major electrode; and the second diode includes a second anode electrode electrically connected to the mounting bed, and a second cathode electrode electrically connected to the second major electrode.
    Type: Application
    Filed: March 9, 2023
    Publication date: March 28, 2024
    Inventors: Toru SUGIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Hideki SEKIGUCHI, Tetsuya OHNO, Masaaki ONOMURA
  • Publication number: 20240097671
    Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.
    Type: Application
    Filed: February 10, 2023
    Publication date: March 21, 2024
    Inventors: Toru SUGIYAMA, Noriaki YOSHIKAWA, Yasuhiko KURIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Tetsuya OHNO, Hideki SEKIGUCHI, Masaaki ONOMURA
  • Publication number: 20240088280
    Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer having a heterojunction, a second semiconductor layer on the first semiconductor layer and having another heterojunction, a drain electrode on the second semiconductor layer, a source electrode provided on the first semiconductor layer, a gate electrode provided on the first semiconductor layer between the drain electrode and the source electrode, and a first insulating film between the gate electrode and the drain electrode covering the first semiconductor layer and the second semiconductor layer. The second semiconductor layer being separated from the gate electrode by a portion of the insulating film. A distance from the second semiconductor layer to the gate electrode is shorter than a distance from the drain electrode to the gate electrode.
    Type: Application
    Filed: February 28, 2023
    Publication date: March 14, 2024
    Inventors: Hung HUNG, Yasuhiro ISOBE, Akira YOSHIOKA, Toru SUGIYAMA, Hitoshi KOBAYASHI
  • Publication number: 20230318585
    Abstract: A divider includes: a divider circuit including a plurality of flip-flops and configured to divide an input first clock signal at a division ratio in accordance with a control signal; and an adjustment circuit configured to adjust a duty ratio of an input second clock signal and outputs the first clock signal. The adjustment circuit performs adjustment so that the duty ratio of the first clock signal increases in a case where the flip-flops are positive edge triggers and the duty ratio of the first clock signal decreases in a case where the flipflops are negative edge triggers.
    Type: Application
    Filed: March 27, 2023
    Publication date: October 5, 2023
    Applicant: LAPIS Technology Co., Ltd.
    Inventor: Toru YOSHIOKA
  • Publication number: 20230318540
    Abstract: A low noise amplifier and a method of controlling an amplifier circuit that can enable detection of a fault are provided. The low noise amplifier includes an amplifier circuit. The amplifier circuit includes an amplification transistor configured to amplify a signal input from an input terminal and to output the amplified signal to a first node, a current mirror circuit configured to supply a bias current to the amplification transistor, a resistor provided on a feedback path for feeding an output of the first node back to the input terminal, and a first switch provided on the feedback path and configured to set up or cut off the feedback path. The feedback path is cut off by the first switch when detection of a fault of the amplification transistor is performed.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 5, 2023
    Applicant: LAPIS Technology Co., Ltd.
    Inventor: Toru YOSHIOKA
  • Patent number: 11442480
    Abstract: A power supply circuit in which an increase in a leakage current can be suppressed is provided. In a power supply circuit in which a main LDO unit outputs a first internal voltage during a normal operation and a sub LDO unit outputs a sleep voltage during a sleep operation, the sleep voltage is applied to a drain of a transistor, and an external voltage higher than the sleep voltage is applied to a gate and a back gate thereof.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: September 13, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Toru Yoshioka, Yoichi Fueki
  • Publication number: 20220278655
    Abstract: A low noise amplifier includes a transistor that amplifies and outputs inputted signals, a buffer that propagates outputs of the transistor to a subsequent circuit, a variable current source that supplies a bias current to the transistor, and a variable resistor connected between a gate terminal of the transistor and a terminal of the transistor to which the variable current source is connected, wherein in a case in which the inputted signals do not pass through the low noise amplifier, the buffer blocks outputs of the transistor, and settings of the variable current source and the variable resistor differ from settings in a case in which the inputted signals pass through the low noise amplifier.
    Type: Application
    Filed: February 25, 2022
    Publication date: September 1, 2022
    Applicant: LAPIS Technology Co., Ltd.
    Inventor: Toru YOSHIOKA
  • Patent number: 10850726
    Abstract: There is provided a vehicle behavior control device capable of improving responsivity of a vehicle behavior and a linear feeling with respect to a steering wheel operation without causing a driver to experience a strong feeling of intervention of the control and, at the same time, capable of controlling behavior of a vehicle in such a manner as to also improve stability of the vehicle attitude and riding comfort. In a vehicle behavior control device applied to a vehicle 1 having steerable front road wheels 2, the vehicle behavior control device includes a PCM 14 which acquires a steering speed of the vehicle, and increases a pitch angle in such a direction that a front portion of the vehicle dips when the steering speed becomes equal to or greater than a given threshold TS1 which is greater than zero.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: December 1, 2020
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Toru Yoshioka, Daisuke Umetsu, Osamu Sunahara, Yasunori Takahara, Masaki Chiba
  • Patent number: 10793136
    Abstract: There is provided a vehicle behavior control device capable of improving responsivity of a vehicle behavior and a linear feeling with respect to a steering wheel operation without causing a driver to experience a strong feeling of intervention of the control and, at the same time, capable of controlling behavior of a vehicle in such a manner as to also improve stability of the vehicle attitude and riding comfort. In a vehicle behavior control device applied to a vehicle having steerable front road wheels, the vehicle behavior control device includes a PCM which acquires a steering speed of the vehicle, and generates a deceleration jerk which is a rearward jerk in a longitudinal direction of the vehicle when the steering speed becomes equal to or greater than a given threshold TS1 which is greater than zero.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: October 6, 2020
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Toru Yoshioka, Daisuke Umetsu, Osamu Sunahara, Yasunori Takahara, Masaki Chiba
  • Publication number: 20200310476
    Abstract: A power supply circuit in which an increase in a leakage current can be suppressed is provided. In a power supply circuit in which a main LDO unit outputs a first internal voltage during a normal operation and a sub LDO unit outputs a sleep voltage during a sleep operation, the sleep voltage is applied to a drain of a transistor, and an external voltage higher than the sleep voltage is applied to a gate and a back gate thereof.
    Type: Application
    Filed: March 18, 2020
    Publication date: October 1, 2020
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Toru Yoshioka, Yoichi Fueki
  • Patent number: 10625731
    Abstract: There is provided a vehicle behavior control device capable of improving responsivity of a vehicle behavior and a linear feeling with respect to a steering wheel operation without causing a driver to experience a strong feeling of intervention of the control, and capable of controlling behavior in such a manner as to improve stability of the vehicle attitude and riding comfort. The device includes a PCM which acquires a steering speed relating to a jerk in a width direction of the vehicle, sets a torque reduction flag, indicative of whether or not a condition for allowing reduction of an output torque of an engine is satisfied, based on the steering speed, and starts to reduce a torque when the torque reduction flag is set to True indicative of a state in which the condition for allowing reduction of the torque is satisfied.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: April 21, 2020
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Toru Yoshioka, Daisuke Umetsu, Osamu Sunahara, Yasunori Takahara, Masaki Chiba
  • Publication number: 20200070812
    Abstract: There is provided a vehicle behavior control device capable of improving responsivity of a vehicle behavior and a linear feeling with respect to a steering wheel operation without causing a driver to experience a strong feeling of intervention of the control and, at the same time, capable of controlling behavior of a vehicle in such a manner as to also improve stability of the vehicle attitude and riding comfort. In a vehicle behavior control device applied to a vehicle 1 having steerable front road wheels 2, the vehicle behavior control device includes a PCM 14 which acquires a steering speed of the vehicle, and increases a vertical load on the front road wheels when the steering speed becomes equal to or greater than a given threshold TS1 which is greater than zero.
    Type: Application
    Filed: March 30, 2017
    Publication date: March 5, 2020
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Toru YOSHIOKA, Daisuke UMETSU, Osamu SUNAHARA, Yasunori TAKAHARA, Masaki CHIBA
  • Publication number: 20200070811
    Abstract: There is provided a vehicle behavior control device capable of improving responsivity of a vehicle behavior and a linear feeling with respect to a steering wheel operation without causing a driver to experience a strong feeling of intervention of the control and, at the same time, capable of controlling behavior of a vehicle in such a manner as to also improve stability of the vehicle attitude and riding comfort. In a vehicle behavior control device applied to a vehicle 1 having steerable front road wheels 2, the vehicle behavior control device includes a PCM 14 which acquires a steering speed of the vehicle, and increases a pitch angle in such a direction that a front portion of the vehicle dips when the steering speed becomes equal to or greater than a given threshold TS1 which is greater than zero.
    Type: Application
    Filed: March 30, 2017
    Publication date: March 5, 2020
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Toru YOSHIOKA, Daisuke UMETSU, Osamu SUNAHARA, Yasunori TAKAHARA, Masaki CHIBA
  • Publication number: 20190084552
    Abstract: There is provided a vehicle behavior control device capable of improving responsivity of a vehicle behavior and a linear feeling with respect to a steering wheel operation without causing a driver to experience a strong feeling of intervention of the control and, at the same time, capable of controlling behavior of a vehicle in such a manner as to also improve stability of the vehicle attitude and riding comfort. In a vehicle behavior control device applied to a vehicle having steerable front road wheels, the vehicle behavior control device includes a PCM which acquires a steering speed of the vehicle, and generates a deceleration jerk which is a rearward jerk in a longitudinal direction of the vehicle when the steering speed becomes equal to or greater than a given threshold TS1 which is greater than zero.
    Type: Application
    Filed: March 30, 2017
    Publication date: March 21, 2019
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Toru YOSHIOKA, Daisuke UMETSU, Osamu SUNAHARA, Yasunori TAKAHARA, Masaki CHIBA
  • Publication number: 20190061739
    Abstract: There is provided a vehicle behavior control device capable of improving responsivity of a vehicle behavior and a linear feeling with respect to a steering wheel operation without causing a driver to experience a strong feeling of intervention of the control, and capable of controlling behavior in such a manner as to improve stability of the vehicle attitude and riding comfort. The device includes a PCM which acquires a steering speed relating to a jerk in a width direction of the vehicle, sets a torque reduction flag, indicative of whether or not a condition for allowing reduction of an output torque of an engine is satisfied, based on the steering speed, and starts to reduce a torque when the torque reduction flag is set to True indicative of a state in which the condition for allowing reduction of the torque is satisfied.
    Type: Application
    Filed: March 30, 2017
    Publication date: February 28, 2019
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Toru YOSHIOKA, Daisuke UMETSU, Osamu SUNAHARA, Yasunori TAKAHARA, Masaki CHIBA
  • Patent number: 10083887
    Abstract: The present invention provides a chip component-embedded resin multilayer substrate including a laminating body obtained by laminating a plurality of resin layers, a predetermined wiring conductor disposed in the laminating body, and a chip component embedded in the laminating body and having a side terminal electrode. A guarding member electrically isolated from the wiring conductor is provided to cover at least a part of a boundary between the side terminal electrode and the resin layers when viewed from a lamination direction of the laminating body, and the guarding member is formed from a material having a melting point higher than a temperature at which the resin layer begins to flow.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: September 25, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoichi Saito, Toru Yoshioka
  • Publication number: 20140029222
    Abstract: The present invention provides a chip component-embedded resin multilayer substrate including a laminating body obtained by laminating a plurality of resin layers, a predetermined wiring conductor disposed in the laminating body, and a chip component embedded in the laminating body and having a side terminal electrode. A guarding member electrically isolated from the wiring conductor is provided to cover at least a part of a boundary between the side terminal electrode and the resin layers when viewed from a lamination direction of the laminating body, and the guarding member is formed from a material having a melting point higher than a temperature at which the resin layer begins to flow.
    Type: Application
    Filed: October 1, 2013
    Publication date: January 30, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yoichi Saito, Toru Yoshioka
  • Publication number: 20120074912
    Abstract: A control circuit (microcomputer) is provided in each of two inverter portions. Magnitude of a target waveform signal corresponding to a voltage to be output by each of the inverter portions is varied according to an operation state. The number of revolution of the engine is adjusted according to the larger one of the effective powers output from the two inverter portions. To cope with a temporary output shortage from the AC generator, the output voltage is temporarily lowered and then the output voltage is restored after waiting for the number of revolution of the engine increases.
    Type: Application
    Filed: October 27, 2009
    Publication date: March 29, 2012
    Applicants: YANMAR CO., LTD., SAWAFUJI ELECTRIC CO., LTD.
    Inventors: Masao Namai, Toru Yoshioka, Shinichi Azuma, Yukio Karasawa, Shinji Hibi, Takashi Abe