Patents by Inventor Toru Yumoto

Toru Yumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11109492
    Abstract: Provided is a structure that has highly reliable electroconductive pattern regions, that offers an extremely simple manufacturing process, and that has excellent electrical insulation between the electroconductive pattern regions. This structure (10) having electroconductive pattern regions is provided with a support (11), and, on a surface configured by the support, a layer (14) in which insulation regions (12) containing a copper oxide- and phosphorus-containing organic substance and electroconductive pattern regions (13) containing copper are disposed next to one another. This stack is provided with: a support, a coating layer containing copper oxide and phosphorus and disposed on a surface configured by the support; and a resin layer disposed so as to cover the coating layer.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: August 31, 2021
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Masato Saito, Toru Yumoto, Masanori Tsuruta
  • Publication number: 20210225551
    Abstract: A conductive pattern having high dispersion stability and a low resistance over a board is formed. A dispersing element (1) contains a copper oxide (2), a dispersing agent (3), and a reductant. Content of the reductant is in a range of a following formula (1). Content of the dispersing agent is in a range of a following formula (2). 0.0001?(reductant mass/copper oxide mass)?0.10??(1) 0.0050?(dispersing agent mass/copper oxide mass)?0.30??(2) The dispersing element containing the reductant promotes reduction of copper oxide to copper in firing and promotes sintering of the copper.
    Type: Application
    Filed: March 26, 2021
    Publication date: July 22, 2021
    Applicant: Asahi Kasei Kabushiki Kaisha
    Inventors: Eiichi Ohno, Toru Yumoto, Masanori Tsuruta
  • Publication number: 20210155818
    Abstract: In the present invention, a conductive film having low resistance is formed on a substrate, said film having excellent storage stability and high dispersion stability as an ink. A copper oxide ink (1) contains a copper oxide (2), a dispersant (3), and a reducing agent. The content of the reducing agent is in the range of formula (1), and the content of the dispersant is in the range of formula (2). (1) 0.00010?(reducing agent mass/copper oxide mass)?0.10 (2) 0.0050?(dispersant mass/copper oxide mass)?0.30 The reducing agent content promotes the reduction of copper oxide to copper during firing, and promotes the sintering of copper.
    Type: Application
    Filed: July 27, 2018
    Publication date: May 27, 2021
    Applicant: Asahi Kasei Kabushiki Kaisha
    Inventors: Masanori Tsuruta, Toru Yumoto
  • Patent number: 10944018
    Abstract: The present invention relates to an application liquid for forming a semiconductor film, the application liquid comprising: an inorganic semiconductor particle; and a compound having a relative permittivity of 2 or more or a compound having reducing power against the inorganic semiconductor particle; a method for producing a semiconductor film comprising a step of applying the application liquid; a semiconductor film and a semiconductor element comprising the semiconductor film; and a method for producing the semiconductor element.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: March 9, 2021
    Assignees: Asahi Kasei Kabushiki Kaisha, Tohoku University
    Inventors: Akira Watanabe, Toru Yumoto
  • Publication number: 20200170125
    Abstract: Provided is a structure that has highly reliable electroconductive pattern regions, that offers an extremely simple manufacturing process, and that has excellent electrical insulation between the electroconductive pattern regions. This structure (10) having electroconductive pattern regions is provided with a support (11), and, on a surface configured by the support, a layer (14) in which insulation regions (12) containing a copper oxide- and phosphorus-containing organic substance and electroconductive pattern regions (13) containing copper are disposed next to one another. This stack is provided with: a support, a coating layer containing copper oxide and phosphorus and disposed on a surface configured by the support; and a resin layer disposed so as to cover the coating layer.
    Type: Application
    Filed: July 18, 2018
    Publication date: May 28, 2020
    Applicant: Asahi Kasei Kabushiki Kaisha
    Inventors: Masato Saito, Toru Yumoto, Masanori Tsuruta
  • Patent number: 10566144
    Abstract: Provided are a solar cell that can be manufactured by non-vacuum process and can have more excellent photoelectric conversion efficiency and a manufacturing method therefor as well as such a semiconductor device and a manufacturing method therefor. A solar cell, includes at least a first semiconductor layer and a second semiconductor layer. The first semiconductor layer includes metal oxide particles of 1 nm or more and 500 nm or less in average particle size and a compound having relative permittivity of 2 or more and 1,000 or less. For instance, the content of the organic compound in the first semiconductor layer is 10 mass % or more and 90 mass % or less.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: February 18, 2020
    Assignees: Asahi Kasei Kabushiki Kaisha, Tohoku University
    Inventors: Toru Yumoto, Toshiyuki Hirano, Takahiro Sawamura, Akira Watanabe
  • Patent number: 10535788
    Abstract: The present invention relates to an application liquid for forming a semiconductor film, the application liquid comprising: an inorganic semiconductor particle; and a compound having a relative permittivity of 2 or more or a compound having reducing power against the inorganic semiconductor particle; a method for producing a semiconductor film comprising a step of applying the application liquid; a semiconductor film and a semiconductor element comprising the semiconductor film; and a method for producing the semiconductor element.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: January 14, 2020
    Assignees: Asahi Kasei Kabushiki Kaisha, Tohoku University
    Inventors: Akira Watanabe, Toru Yumoto
  • Publication number: 20200013521
    Abstract: A conductive pattern having high dispersion stability and a low resistance over a board is formed. A dispersing element (1) contains a copper oxide (2), a dispersing agent (3), and a reductant. Content of the reductant is in a range of a following formula (1). Content of the dispersing agent is in a range of a following formula (2). 0.0001?(reductant mass/copper oxide mass)?0.10??(1) 0.0050?(dispersing agent mass/copper oxide mass)?0.30??(2) The dispersing element containing the reductant promotes reduction of copper oxide to copper in firing and promotes sintering of the copper.
    Type: Application
    Filed: March 15, 2018
    Publication date: January 9, 2020
    Applicant: Asahi Kasei Kabushiki Kaisha
    Inventors: Eiichi Ohno, Toru Yumoto, Masanori Tsuruta
  • Publication number: 20180374652
    Abstract: Provided are a solar cell that can be manufactured by non-vacuum process and can have more excellent photoelectric conversion efficiency and a manufacturing method therefor as well as such a semiconductor device and a manufacturing method therefor. A solar cell, includes at least a first semiconductor layer and a second semiconductor layer. The first semiconductor layer includes metal oxide particles of 1 nm or more and 500 nm or less in average particle size and a compound having relative permittivity of 2 or more and 1,000 or less. For instance, the content of the organic compound in the first semiconductor layer is 10 mass % or more and 90 mass % or less.
    Type: Application
    Filed: September 4, 2018
    Publication date: December 27, 2018
    Applicants: ASAHI KASEI KABUSHIKI KAISHA, TOHOKU UNIVERSITY
    Inventors: Toru YUMOTO, Toshiyuki HIRANO, Takahiro SAWAMURA, Akira WATANABE
  • Patent number: 10109429
    Abstract: Provided are a solar cell that can be manufactured by non-vacuum process and can have more excellent photoelectric conversion efficiency and a manufacturing method therefor as well as such a semiconductor device and a manufacturing method therefor. A solar cell, includes at least a first semiconductor layer (140) and a second semiconductor layer (130). The first semiconductor layer (140) includes metal oxide particles of 1 nm or more and 500 nm or less in average particle size and a compound having relative permittivity of 2 or more and 1,000 or less. For instance, the content of the organic compound in the first semiconductor layer (140) is 10 mass % or more and 90 mass % or less.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: October 23, 2018
    Assignees: Asahi Kasei Kabushiki Kaisha, Tohoku University
    Inventors: Toru Yumoto, Toshiyuki Hirano, Takahiro Sawamura, Akira Watanabe
  • Publication number: 20180130913
    Abstract: The present invention relates to an application liquid for forming a semiconductor film, the application liquid comprising: an inorganic semiconductor particle; and a compound having a relative permittivity of 2 or more or a compound having reducing power against the inorganic semiconductor particle; a method for producing a semiconductor film comprising a step of applying the application liquid; a semiconductor film and a semiconductor element comprising the semiconductor film; and a method for producing the semiconductor element.
    Type: Application
    Filed: December 14, 2017
    Publication date: May 10, 2018
    Applicants: Asahi Kasei Kabushiki Kaisha, Tohoku University
    Inventors: Akira Watanabe, Toru Yumoto
  • Publication number: 20160293342
    Abstract: Provided are a solar cell that can be manufactured by non-vacuum process and can have more excellent photoelectric conversion efficiency and a manufacturing method therefor as well as such a semiconductor device and a manufacturing method therefor. A solar cell, includes at least a first semiconductor layer (140) and a second semiconductor layer (130). The first semiconductor layer (140) includes metal oxide particles of 1 nm or more and 500 nm or less in average particle size and a compound having relative permittivity of 2 or more and 1,000 or less. For instance, the content of the organic compound in the first semiconductor layer (140) is 10 mass % or more and 90 mass % or less.
    Type: Application
    Filed: September 17, 2014
    Publication date: October 6, 2016
    Applicants: ASAHI KASEI KABUSHIKI KAISHA, TOHOKU UNIVERSITY
    Inventors: Toru YUMOTO, Toshiyuki HIRANO, Takahiro SAWAMURA, Akira WATANABE
  • Publication number: 20150200312
    Abstract: The present invention relates to an application liquid for forming a semiconductor film, the application liquid comprising: an inorganic semiconductor particle; and a compound having a relative permittivity of 2 or more or a compound having reducing power against the inorganic semiconductor particle; a method for producing a semiconductor film comprising a step of applying the application liquid; a semiconductor film and a semiconductor element comprising the semiconductor film; and a method for producing the semiconductor element.
    Type: Application
    Filed: July 18, 2013
    Publication date: July 16, 2015
    Applicants: TOHOKU UNIVERSITY, ASAHI KASEI KABUSHIKI KAISHA
    Inventors: Akira Watanabe, Toru Yumoto
  • Patent number: 8101230
    Abstract: It is intended to provide a method for producing an electronic device having a multilayer structure by a coating method, and a coating solution suitable for the production method. The present invention provides a method for producing an electronic device having at least two or more stacked layers containing organic matter, comprising a first step of applying a coating solution containing organic matter and a metal and/or a metal oxide onto a substrate either directly or via an additional layer to form a mixed layer, and a second step of directly applying a solution containing organic matter onto the mixed layer formed in the first step to form an organic layer. According to this method, an electronic device having a multilayer structure can be produced easily by a convenient coating method.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: January 24, 2012
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventor: Toru Yumoto
  • Publication number: 20080145520
    Abstract: It is intended to provide a method for producing an electronic device having a multilayer structure by a coating method, and a coating solution suitable for the production method. The present invention provides a method for producing an electronic device having at least two or more stacked layers containing organic matter, comprising a first step of applying a coating solution containing organic matter and a metal and/or a metal oxide onto a substrate either directly or via an additional layer to form a mixed layer, and a second step of directly applying a solution containing organic matter onto the mixed layer formed in the first step to form an organic layer. According to this method, an electronic device having a multilayer structure can be produced easily by a convenient coating method.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 19, 2008
    Applicant: Asahi Kasei Kabushiki Kaisha
    Inventor: Toru Yumoto