Abstract: A semiconductor integrated circuit device is disclosed, which includes a test circuit for facilitating A.C. characteristic test thereof. This test circuit includes a delay circuit, a first register for temporarily storing test data to be supplied to the delay circuit and a second register for temporarily storing data derived from the delay circuit. The delay circuit has a delay time approximately equal to a data propagation delay time on a critical path formed in the integrated circuit device. The device also includes a scan pass type test circuit for a function test thereof. The scan-in terminal is used to supply the test data to the first register and the scan-out terminal is used to receive data from the second register.