Abstract: A semiconductor device is configured to include: a base member of a semiconductor material which forms a thin plate shape; a front face electrode which is placed on a front surface of the base member; a rear face electrode which covers a rear surface of the base member; and a via hole which forms a hole shape provided with the front face electrode as a bottom and being open onto the rear surface, and through which the front face electrode and the rear face electrode are electrically connected to each other; wherein, at a circumferential edge portion of the base member on its side where the rear surface is located, a protrusion portion which protrudes in a thickness direction is disposed.

Abstract: A semiconductor device is configured to include: a base member of a semiconductor material which forms a thin plate shape; a front face electrode which is placed on a front surface of the base member; a rear face electrode which covers a rear surface of the base member; and a via hole which forms a hole shape provided with the front face electrode as a bottom and being open onto the rear surface, and through which the front face electrode and the rear face electrode are electrically connected to each other; wherein, at a circumferential edge portion of the base member on its side where the rear surface is located, a protrusion portion which protrudes in a thickness direction is disposed.

Abstract: A nitride semiconductor layer (2,3,4) is provided on a Si substrate (1). A gate electrode (5), a source electrode (6) and a drain electrode (7) are provided on the nitride semiconductor layer (2,3,4). A P-type conductive layer (11) in contact with the nitride semiconductor layer (2,3,4) is provided on the Si substrate (1) below the drain electrode (7).

Abstract: A nitride semiconductor layer (2,3,4) is provided on a Si substrate (1). A gate electrode (5), a source electrode (6) and a drain electrode (7) are provided on the nitride semiconductor layer (2,3,4). A P-type conductive layer (11) in contact with the nitride semiconductor layer (2,3,4) is provided on the Si substrate (1) below the drain electrode (7).

Abstract: A field effect transistor includes: a semiconductor substrate having a main surface; a plurality of source electrodes and a plurality of drain electrodes alternately disposed and ohmic-connected with the main surface of the semiconductor substrate; a plurality of gate electrodes Schottky-connected with the main surface of the semiconductor substrate and respectively disposed between the plurality of source electrodes and the plurality of drain electrodes; and a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate, wherein each of the plurality of drain electrodes has first and second portions separated from each other, a sum of widths of the first and second portions of each drain electrode is smaller than a width of one source electrode, the Schottky electrode is disposed between the first portion and the second portion of the drain electrode.

Abstract: A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.

Abstract: A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.

Abstract: A field effect transistor includes: a semiconductor substrate having a main surface; a plurality of source electrodes and a plurality of drain electrodes alternately disposed and ohmic-connected with the main surface of the semiconductor substrate; a plurality of gate electrodes Schottky-connected with the main surface of the semiconductor substrate and respectively disposed between the plurality of source electrodes and the plurality of drain electrodes; and a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate, wherein each of the plurality of drain electrodes has first and second portions separated from each other, a sum of widths of the first and second portions of each drain electrode is smaller than a width of one source electrode, the Schottky electrode is disposed between the first portion and the second portion of the drain electrode.

Abstract: A method for manufacturing an laser diode includes: providing a wafer having thereon a semiconductor structure; depositing an SiO2 film; forming channels and a waveguide ridge between the channels in the wafer; forming an SiO2 film over the wafer; forming a resist pattern covering the SiO2 film in the channels such that the top surfaces of the resist pattern are lower than the top surface of the deposited SiO2 film on the top of the waveguide ridge, the resist pattern exposing the SiO2 film on the top of the waveguide ridge; removing the SiO2 film and the deposited SiO2 film by wet etching, using the resist pattern as a mask, to expose a p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.

Abstract: A time interval analyzer includes a phase comparator which decides whether a measured signal contains a delay quantity for either a positive delay or a negative delay relative to a characteristic value, and a processor circuit which outputs a ratio of a number of the measured signals containing the positive delay and a number of the measured signals containing the negative delay.

Abstract: A method for manufacturing an laser diode includes: providing a wafer having thereon a semiconductor structure; depositing an SiO2 film; forming channels and a waveguide ridge between the channels in the wafer; forming an SiO2 film over the wafer; forming a resist pattern covering the SiO2 film in the channels such that the top surfaces of the resist pattern are lower than the top surface of the deposited SiO2 film on the top of the waveguide ridge, the resist pattern exposing the SiO2 film on the top of the waveguide ridge; removing the SiO2 film and the deposited SiO2 film by wet etching, using the resist pattern as a mask, to expose a p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.

Abstract: After a HEMT is formed, side walls are formed on a semiconductor substrate. Next, a sacrificial layer is formed to cover the HEMT. Next, contact holes are formed in the sacrificial layer to expose upper surfaces of source electrodes. Next, a metal interconnect line is formed by patterning a metal film formed on the entire top surface. Next, slits are formed in the metal interconnect line to partially expose an upper surface of the sacrificial layer. After the sacrificial layer is dissolved, the dissolved sacrificial layer is discharged through the slits to the outside. An air space is formed as a result of the removal of the sacrificial layer.

Abstract: In a method for manufacturing a compound semiconductor device, a principal surface of a SiC wafer, on which a compound semiconductor device is located, is bonded to a support substrate with an adhesive having a softening point higher than 200° C. A via hole is formed dry etching, including supplying a fluorine-containing etching gas to a rear side of the SiC wafer. Thereafter, the support substrate and the adhesive are removed. Preferably, the adhesive is formed by reacting one material coating the principal surface of the SiC wafer, and another material coating the support substrate.

Abstract: After a HEMT is formed, side walls are formed on a semiconductor substrate. Next, a sacrificial layer is formed to cover the HEMT. Next, contact holes are formed in the sacrificial layer to expose upper surfaces of source electrodes. Next, a metal interconnect line is formed by patterning a metal film formed on the entire top surface. Next, slits are formed in the metal interconnect line to partially expose an upper surface of the sacrificial layer. After the sacrificial layer is dissolved, the dissolved sacrificial layer is discharged through the slits to the outside. An air space is formed as a result of the removal of the sacrificial layer.

Abstract: An optical system including an objective lens applies five light beams (31 to 35) generated by an optical pickup to a plurality of adjacent tracks on a signal plane of a CD-ROM. Light beams reflected from the signal plane are detected with photodetectors (PD1, to PD6), and in accordance with the detection outputs of the photodetectors (PD1 to PD5), a record data read system reads at the same time data recorded on respective tracks applied with the light beams (31 to 35), and outputs to read data in the record order of CD-ROM by preventing the read data from being duplicated or omitted. Prior to reading record data, a system controller performs an offset bias adjustment of a focus servo system.

Abstract: A semiconductor device includes an InP substrate; an undoped InAlAs buffer layer, an undoped InGaAs active layer, and an n type InAlAs electron supply layer successively disposed on the InP substrate; a T-shaped gate electrode on the n type electron supply layer, the T-shaped gate electrode having an upper overhanging part; n type InGaAs cap layers disposed on the n type electron supply layer at opposite sides of and spaced apart from the T-shaped gate electrode, each cap layer having a portion positioned beneath the upper overhanging part of the T-shaped gate electrode; and a source electrode and a drain electrode respectively disposed on the cap layers, each of these electrodes having a portion positioned beneath the upper overhanging part of the T-shaped gate electrode.

Abstract: An etchant includes an aqueous solution containing citric acid, ammonium citrate, and hydrogen peroxide, wherein the mol ratio of ammonium citrate to citric acid is not less than 1. Using this etchant, a WSi layer on an InAlAs layer can be etched selectively with respect to the InAlAs layer.

Abstract: A field effect transistor includes a semi-insulating GaAs substrate; source, gate, and drain electrodes disposed on a surface of the GaAs substrate; a low carrier concentration active region disposed in the GaAs substrate lying beneath the gate electrode; intermediate carrier concentration regions disposed in the GaAs substrate at opposite sides of and in contact with the low carrier concentration active region; high carrier concentration source and drain regions disposed in the GaAs substrate at opposite sides of and in contact with the intermediate carrier concentration regions and lying beneath the source and drain electrodes, respectively; and first and second high carrier concentration regions having a carrier concentration as high as or higher than that of the high carrier concentration source and drain regions. The first and second high carrier concentration regions are disposed in the intermediate carrier concentration regions and reach the surface.

Abstract: A light/ozone asher includes a process chamber having a sample stage for supporting a sample processed with active oxygen generated by irradiating ozone with UV rays while not irradiating the sample with UV rays. Since the sample is not irradiated with UV rays when an organic substance on the sample surface is removed, an organic substance (scum) left by removal of parts of the organic substance on the sample is removed without destroying the remaining pattern of organic substance.

Abstract: A field effect transistor includes a semi-insulating GaAs substrate; source, gate, and drain electrodes disposed on a surface of the GaAs substrate; a low carrier concentration active region disposed in the GaAs substrate lying beneath the gate electrode; intermediate carrier concentration regions disposed in the GaAs substrate at opposite sides of and in contact with the low carrier concentration active region; high carrier concentration source and drain regions disposed in the GaAs substrate at opposite sides of and in contact with the intermediate carrier concentration regions and lying beneath the source and drain electrodes, respectively; and first and second high carrier concentration regions having a carrier concentration as high as or higher than that of the high carrier concentration source and drain regions. The first and second high carrier concentration regions are disposed in the intermediate carrier concentration regions and reach the surface.