Patents by Inventor Toshiaki Saruwatari
Toshiaki Saruwatari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9255961Abstract: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information. A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.Type: GrantFiled: November 15, 2013Date of Patent: February 9, 2016Assignee: Cypress Semiconductor CorporationInventors: Takashi Sato, Toshiaki Saruwatari, Ken Ryu
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Publication number: 20140070840Abstract: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information. A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.Type: ApplicationFiled: November 15, 2013Publication date: March 13, 2014Applicant: Spansion LLCInventors: Takashi SATO, Toshiaki Saruwatari, Ken Ryu
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Patent number: 8595562Abstract: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information. A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.Type: GrantFiled: January 26, 2011Date of Patent: November 26, 2013Assignee: Spansion LLCInventors: Takashi Sato, Toshiaki Saruwatari, Ken Ryu
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Publication number: 20110302456Abstract: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information, A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.Type: ApplicationFiled: January 26, 2011Publication date: December 8, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Takashi Sato, Toshiaki Saruwatari, Ken Ryu
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Patent number: 7349998Abstract: The present invention is a command or data transfer between two integrated circuit devices (hereafter LSIs) wherein an LSI issuing a command or data (issuing side LSI) outputs a strobe signal, which indicates that a valid command or data was transmitted, to the LSI which receives the command or data (receiving side LSI), and the receiving side LSI outputs a signal, which notifies that the command processing completed (command ready signal), to the issuing side LSI. The issuing side LSI comprises a counter where a value to indicate the number of commands which the receiving side LSI can simultaneously process or simultaneously receive is loaded at initialization, wherein the counter is decremented when a command or data is issued, the counter is incremented when the ready signal is received, and issuing a command or data is inhibited when the counter becomes “0”. Therefore the issuing side LSI can issue a command or data to the receiving side LSI without confirming a busy signal from the receiving side LSI.Type: GrantFiled: May 25, 2005Date of Patent: March 25, 2008Assignee: Fujitsu LimitedInventors: Yoshio Hirose, Hiroyuki Utsumi, Toshiaki Saruwatari
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Publication number: 20080065870Abstract: An information processing apparatus characterized by having a memory interface with a buffer for reading and buffering an instruction stored in memory, an instruction decoder decoding a program counter relative branch instruction supplied from the above-mentioned memory interface, and extracting a program counter relative branch destination address in the above-mentioned program counter relative branch instruction, and a judgment section judging whether an instruction at the above-mentioned program counter relative branch destination address exists in the buffer in the above-mentioned memory interface on the basis of the above-mentioned program counter relative branch destination address in the same cycle as a cycle of the above-mentioned instruction decoder decoding the above-mentioned program counter relative branch instruction.Type: ApplicationFiled: January 30, 2007Publication date: March 13, 2008Applicant: FUJITSU LIMITEDInventor: Toshiaki Saruwatari
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Publication number: 20070188292Abstract: An alloy type thermal fuse is provided in which, although a fuse element essentially comprising an In-Sn alloy is used, shear breakage at the melting point or lower can be prevented from occurring even under long-term DC application, the operation stability to a heat cycle can be satisfactorily assured, and a process of drawing to the fuse element at a high yield can be ensured, and which has an operating temperature belonging to the range of 120 to 150° C. As a metal element for preventing long-term DC breakage which prevents the fuse element from being broken under long-term DC application, Cu is added to an In-Sn composition of 52 to 85% In and a balance Sn.Type: ApplicationFiled: March 27, 2007Publication date: August 16, 2007Applicant: UCHIHASHI ESTEC CO., LTD.Inventors: Miki IWAMOTO, Naotaka IKAWA, Toshiaki SARUWATARI, Yoshiaki TANAKA
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Patent number: 7042327Abstract: An alloy type thermal fuse is provided in which a ternary Sn—In—Bi alloy is used, the operating temperature belongs to the range of 130 to 170° C., the overload characteristic and the dielectric breakdown characteristic are excellent, the insulation stability after an operation can be sufficiently ensured, and thinning of a fuse element can be easily realized. A fuse element having an alloy composition in which Sn is larger than 43% and 70% or smaller, In is 0.5% or higher and 10% or lower, and a balance is Bi is used.Type: GrantFiled: September 3, 2003Date of Patent: May 9, 2006Assignee: Uchihashi Estec Co., Ltd.Inventors: Yoshiaki Tanaka, Toshiaki Saruwatari
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Patent number: 6963264Abstract: The invention relates to an alloy type thermal fuse and a wire member for a thermal fuse element, and provides an alloy type thermal fuse in which a fuse element does not contain a harmful metal, the operating temperature is about 150° C., the dispersion of the operating temperature can be sufficiently suppressed, and the operation stability to a heat cycle can be satisfactorily assured. The thermal fuse has an alloy composition of 30 to 70% Sn, 0.3 to 20% Sb, and a balance Bi.Type: GrantFiled: June 27, 2003Date of Patent: November 8, 2005Assignee: Uchihashi Estec Co., Ltd.Inventors: Miki Iwamoto, Naotaka Ikawa, Toshiaki Saruwatari, Yoshiaki Tanaka
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Publication number: 20050223151Abstract: The present invention is a command or data transfer between two integrated circuit devices (hereafter LSIs) wherein an LSI issuing a command or data (issuing side LSI) outputs a strobe signal, which indicates that a valid command or data was transmitted, to the LSI which receives the command or data (receiving side LSI), and the receiving side LSI outputs a signal, which notifies that the command processing completed (command ready signal), to the issuing side LSI. The issuing side LSI comprises a counter where a value to indicate the number of commands which the receiving side LSI can simultaneously process or simultaneously receive is loaded at initialization, wherein the counter is decremented when a command or data is issued, the counter is incremented when the ready signal is received, and issuing a command or data is inhibited when the counter becomes “0”. Therefore the issuing side LSI can issue a command or data to the receiving side LSI without confirming a busy signal from the receiving side LSI.Type: ApplicationFiled: May 25, 2005Publication date: October 6, 2005Applicant: Fujitsu LimitedInventors: Yoshio Hirose, Hiroyuki Utsumi, Toshiaki Saruwatari
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Publication number: 20050220661Abstract: An In—Sn alloy of 85 to 52% In provides advantages that dispersion of an operating temperature can be sufficiently eliminated, and that a high yield can be ensured by adequate ductility, but has a defect which is fatal to a DC fuse, or in which troubles due to long-term DC application such as long-term DC application breakage occurs. In view of this fact, when an alloy type thermal fuse in which an In—Sn alloy is used as a fuse element is used under DC application, stability under long-term DC application that is a condition severer than that under AC application is imposed on the alloy type thermal fuse, whereby the fuse can be rationally used.Type: ApplicationFiled: March 21, 2005Publication date: October 6, 2005Inventors: Yoshiaki Tanaka, Naotaka Ikawa, Miki Iwamoto, Toshiaki Saruwatari
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Patent number: 6917995Abstract: The present invention is a command or data transfer between two integrated circuit devices (hereafter LSIS) wherein an LSI issuing a command or data (issuing side LSI) outputs a strobe signal, which indicates that a valid command or data was transmitted, to the LSI which receives the command or data (receiving side LSI), and the receiving side LSI outputs a signal, which notifies that the command processing completed (command ready signal), to the issuing side LSI. The issuing side LSI comprises a counter where a value to indicate the number of commands which the receiving side LSI can simultaneously process or simultaneously receive is loaded at initialization, wherein the counter is decremented when a command or data is issued, the counter is incremented when the ready signal is received, and issuing a command or data is inhibited when the counter becomes “0”. Therefore the issuing side LSI can issue a command or data to the receiving side LSI without confirming a busy signal from the receiving side LSI.Type: GrantFiled: December 20, 2000Date of Patent: July 12, 2005Assignee: Fujitsu LimitedInventors: Yoshio Hirose, Hiroyuki Utsumi, Toshiaki Saruwatari
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Publication number: 20050128044Abstract: An alloy type thermal fuse is provided in which, although a fuse element essentially comprising an In—Sn alloy is used, shear breakage at the melting point or lower can be prevented from occurring even under long-term DC application, the operation stability to a heat cycle can be satisfactorily assured, and a process of drawing to the fuse element at a high yield can be ensured, and which has an operating temperature belonging to the range of 120 to 150° C. As a metal element for preventing long-term DC breakage which prevents the fuse element from being broken under long-term DC application, Cu is added to an In—Sn composition of 52 to 85% In and a balance Sn.Type: ApplicationFiled: September 30, 2004Publication date: June 16, 2005Inventors: Miki Iwamoto, Naotaka Ikawa, Toshiaki Saruwatari, Yoshiaki Tanaka
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Control device for semiconductor memory device and method of controlling semiconductor memory device
Patent number: 6886072Abstract: As a result of comparing an address set in an area setting register and an address shown by address information of an access request signal, if the address set in the area setting register matches the address shown by the address information, a command with auto precharge is outputted to an FCRAM, and if not, an ordinary command is outputted to the FCRAM. Thus, when an area, in which addresses to be accessed are random in many cases, is accessed, the command with auto precharge is outputted to allow the FCRAM to perform a precharge operation automatically, and when an area, in which addresses to be accessed are sequential in many cases, is accessed, the ordinary command is outputted to allow a read operation or a write operation to be performed continuously, whereby data transfer efficiency can be increased.Type: GrantFiled: March 6, 2002Date of Patent: April 26, 2005Assignee: Fujitsu LimitedInventors: Toshiaki Saruwatari, Atsushi Fujita -
Patent number: 6877113Abstract: A semiconductor integrated circuit including a debugging support unit and a buffer memory for temporarily storing trace data, the debugging support unit comprising a break detection member that detects a break signal externally inputted and a break determining member that determines whether the break signal requests to shift to break processing after outputting all the trace data stored in the buffer memory or the break signal requests to shift to the break processing with immediately suspending trace data outputting.Type: GrantFiled: March 21, 2002Date of Patent: April 5, 2005Assignee: Fujitsu LimitedInventors: Toshiaki Saruwatari, Koutarou Tagawa
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Patent number: 6841845Abstract: An alloy type thermal fuse is provided in which, although a fuse element essentially comprising an In-Sn alloy is used, the operation stability to a heat cycle can be satisfactorily assured, and, even when the amount of In is large, a process of drawing to the fuse element at a high yield can be ensured, and which has an operating temperature belonging to the range of 120 to 150° C. The fuse element has an alloy composition in which 0.1 to 7 weight parts of one, or two or more metals selected from the group consisting of Ag, Au, Cu, Ni, Pd, Pt, and Sb are added to 100 weight parts of an alloy of 52 to 85% In and a balance Sn.Type: GrantFiled: July 8, 2003Date of Patent: January 11, 2005Assignee: Uchihashi Estec Co., Ltd.Inventors: Miki Iwamoto, Naotaka Ikawa, Toshiaki Saruwatari, Yoshiaki Tanaka
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Publication number: 20040172518Abstract: Provided is an information processing unit including: a prefetch buffer for fetching an instruction through a bus with its width being twice or more as large as an instruction length, to store the prefetched instruction; a decoder for decoding the instruction stored in the prefetch buffer; and an arithmetic unit for executing the decoded instruction. An instruction request control circuit performs a prefetch request to prefetch a branch target instruction when a branch instruction is decoded, otherwise the instruction request control circuit performs the prefetch request sequentially to prefetch the instructions. A prefetch control circuit fetches the branch target instruction to the prefetch buffer when the branch is ensured to occur by executing the branch instruction, while the prefetch control circuit ignores the branch target instruction when a branch does not occur.Type: ApplicationFiled: October 17, 2003Publication date: September 2, 2004Applicant: FUJITSU LIMITEDInventors: Toshiaki Saruwatari, Seiji Suetake
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Patent number: 6775718Abstract: A direct memory access control system supplies the respective status signals indicating timings of the read data effective state or writable state between the input/output interface and memory interface, both interfaces maintain the read data effective state and writable state of the input/output memory and synchronous memory under control until the later timing comes up. Consequently, it is possible to match the read data effective timing and writable timing of the synchronous memory and input/output memory, thus making possible flyby transfer of data between both memories.Type: GrantFiled: August 22, 2001Date of Patent: August 10, 2004Assignee: Fujitsu LimitedInventors: Toshiaki Saruwatari, Atsushi Fujita
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Publication number: 20040085178Abstract: An alloy type thermal fuse is provided in which a ternary Sn—In—Bi alloy is used, the operating temperature belongs to the range of 130 to 170° C., the overload characteristic and the dielectric breakdown characteristic are excellent, the insulation stability after an operation can be sufficiently ensured, and thinning of a fuse element can be easily realized. A fuse element having an alloy composition in which Sn is larger than 43% and 70% or smaller, In is 0.5% or higher and 10% or lower, and a balance is Bi is used.Type: ApplicationFiled: September 3, 2003Publication date: May 6, 2004Applicant: Uchihashi Estec Co., Ltd.Inventors: Yoshiaki Tanaka, Toshiaki Saruwatari
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Publication number: 20040066268Abstract: The invention relates to an alloy type thermal fuse and a wire member for a thermal fuse element, and provides an alloy type thermal fuse in which a fuse element does not contain a harmful metal, the operating temperature is about 150° C., the dispersion of the operating temperature can be sufficiently suppressed, and the operation stability to a heat cycle can be satisfactorily assured. The thermal fuse has an alloy composition of 30 to 70% Sn, 0.3 to 20% Sb, and a balance Bi.Type: ApplicationFiled: June 27, 2003Publication date: April 8, 2004Applicant: Uchihashi Estec Co., Ltd.Inventors: Miki Iwamoto, Naotaka Ikawa, Toshiaki Saruwatari, Yoshiaki Tanaka