Patents by Inventor Toshiaki Shiraiwa

Toshiaki Shiraiwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190004293
    Abstract: A positional shift of a lens of a stacked lens structure is reduced. A plurality of through-holes is formed at a position shifted from a first target position on a substrate according to a first shift. A lens is formed on an inner side of each of the through-holes using a first mold in which a plurality of first transfer surfaces is disposed at a position shifted from a predetermined second target position according to a second shift and a second mold in which a plurality of second transfer surfaces is disposed at a position shifted from a predetermined third target position according to a third shift. The plurality of substrates having the lenses formed therein is formed according to direct bonding, and the plurality of stacked substrates is divided. The present technique can be applied to a stacked lens structure or the like, for example.
    Type: Application
    Filed: July 15, 2016
    Publication date: January 3, 2019
    Inventors: Kunihiko HIKICHI, Koichi TAKEUCHI, Toshihiro KUROBE, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20180259749
    Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.
    Type: Application
    Filed: July 15, 2016
    Publication date: September 13, 2018
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke MORIYA, Masanori IWASAKI, Takashi OINOUE, Yoshiya HAGIMOTO, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20180246258
    Abstract: Influence of chipping in case of dicing a plurality of stacked substrates is reduced. Provided is a semiconductor device where a substrate, in which a groove surrounding a pattern configured with a predetermined circuit or part is formed, is stacked. The present technology can be applied to, for example, a stacked lens structure where through-holes are formed in each substrate and lenses are disposed in inner sides of the through-holes, a camera module where a stacked lens structure and a light-receiving device are incorporated, a solid-state imaging device where a pixel substrate and a control substrate are stacked, and the like.
    Type: Application
    Filed: July 19, 2016
    Publication date: August 30, 2018
    Inventors: Toshiaki SHIRAIWA, Masaki OKAMOTO, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Minoru ISHIDA
  • Publication number: 20180217361
    Abstract: Substrates with lenses having lenses disposed therein are aligned with high accuracy. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are direct-bonded and stacked. In particular, one or more air grooves formed in surfaces of the substrates reduces an influence of air inside a void portion between adjacent lenses of a layered lens structure.
    Type: Application
    Filed: July 19, 2016
    Publication date: August 2, 2018
    Inventors: Hirotaka YOSHIOKA, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20180203164
    Abstract: Substrates with lenses having lenses disposed therein are aligned with high accuracy. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are direct-bonded and stacked based on an alignment mark. The alignment mark is formed simultaneously with the through-hole. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.
    Type: Application
    Filed: July 19, 2016
    Publication date: July 19, 2018
    Inventors: Atsushi YAMAMOTO, Koichi TAKEUCHI, Toshihiro KUROBE, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20180196170
    Abstract: To suppress occurrence of contamination or damage to a lens. In the present technology, for example, a manufacturing apparatus allows a spacer which is thicker than a height of a lens resin portion protruded from a substrate to be adhered to the substrate. In addition, for example, in the present technology, the manufacturing apparatus molds the lens resin portion inside a through-hole formed in the substrate by using a mold frame configured with two layers of molds and, after molding the lens resin portion, in the state that one mold is adhered to the substrate, the manufacturing apparatus demolds the substrate from the other mold. The present technology can be applied to, for example, a lens-attached substrate, a stacked lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic apparatus, a computer, a program, a storage medium, a system, or the like.
    Type: Application
    Filed: July 15, 2016
    Publication date: July 12, 2018
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Hiroshi TAZAWA, Toshihiro KUROBE, Sotetsu SAITO, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20180108697
    Abstract: A deformation of a stacked lens is suppressed. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.
    Type: Application
    Filed: July 15, 2016
    Publication date: April 19, 2018
    Applicant: SONY CORPORATION
    Inventors: Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Masanori IWASAKI, Toshihiko HAYASHI, Shuzo SATO, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Patent number: 7808026
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: October 5, 2010
    Assignees: Sony Corporation
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
  • Patent number: 7473646
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: January 6, 2009
    Assignees: Sony Corporation
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
  • Publication number: 20080286883
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Application
    Filed: May 27, 2008
    Publication date: November 20, 2008
    Applicants: Sony Corporation, Seiji Samukawa
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
  • Publication number: 20070026681
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Application
    Filed: August 26, 2004
    Publication date: February 1, 2007
    Applicant: SONY CORPORATION
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
  • Patent number: 5355629
    Abstract: A door for a vehicle is assembled by joining three modules together to facilitate the assembly process. The three modules are an outer module including an outer panel, a window regulator module including a window pane and a window regulator, and an inner module including an interior member. The window regulator module is preliminarily assembled as an independent unit, so that it is easy to adjust the open and closed positions and the movement of the window pane. These modules are joined by fastening means extending along the direction of the thickness of the door, so that the assembly operation is made easier.
    Type: Grant
    Filed: December 23, 1992
    Date of Patent: October 18, 1994
    Assignee: Nissan Motor Company, Ltd.
    Inventors: Koichi Kimura, Kenichi Hirooka, Hiroshi Tsuchiya, Akito Tozuka, Shuji Yamagata, Kiyoto Matsuzaki, Kensuke Uchida, Toshiaki Shiraiwa, Sumio Inami, Eiji Murakami, Tetsuji Nasu, Takayuki Sano