Abstract: There is provided an electronic device package and the like in which it is not likely that damage occurs in a wiring pattern of an interposer substrate in a gap section formed, for example, between an electronic device and an insertion substrate. The semiconductor package in accordance with the present invention is a package of fan-out type including an interposer substrate and a semiconductor device and an insertion substrate which are arranged on the substrate. The interposer substrate 3 includes a wiring pattern therein. A gap is formed between the semiconductor device and the insertion substrate; in an area corresponding to the gap, a reinforcing member (a metallic film 7) is formed to increase strength of the wiring pattern.

Abstract: There is provided an electronic device package and the like in which it is not likely that damage occurs in a wiring pattern of an interposer substrate in a gap section formed, for example, between an electronic device and an insertion substrate. The semiconductor package in accordance with the present invention is a package of fan-out type including an interposer substrate 3 and a semiconductor device 1 and an insertion substrate 18 which are arranged on the substrate 3. The interposer substrate 3 includes a wiring pattern 6 therein. A gap 8 is formed between the semiconductor device 1 and the insertion substrate 18; in an area corresponding to the gap, a reinforcing member (a metallic film 7) is formed to increase strength of the wiring pattern 6.

Abstract: In a semiconductor device, an average grain size of a filler contained in an adhesive agent applied to the first chip is larger than an interval between adjacent wires. When the second chip is pressed downward, the filler is caught between the wires, a larger number of filler grains is held between the first and second chip. The interval between the first and the second chip can be stably maintained. Since the number of filler grains left to be held between the first and second chip is larger than that in the conventional art, a pressure applied to the second chip is uniformly distributed while suppressing the number of filler grains contained in the adhesive agent from increasing, and a pressure applied to the grains is lower than that in the conventional art.

Abstract: There is provided a semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, including: a lower-layer semiconductor chip which is mounted on a package board; an upper-layer semiconductor chip which is stacked via a plurality of spacers on the lower-layer semiconductor chip; at least one first conductor interconnecting electrically at least one first electrode on the lower-layer semiconductor chip and at least one first internal terminal on the package board; at least one second conductor electrically interconnecting at least one second electrode on the upper-layer semiconductor chip and at least one second internal terminal on the package board; and the package for sealing therein the lower-layer semiconductor chip, the upper-layer semiconductor chip, and the at least one first conductor and the at least one second conductor which are all on the package board.

Abstract: There is provided a semiconductor device in which a plurality of semiconductor chips is stacked in layers and sealed in a package, including: a lower-layer semiconductor chip which is mounted on a package board; an upper-layer semiconductor chip which is stacked via a plurality of spacers on the lower-layer semiconductor chip; at least one first conductor interconnecting electrically at least one first electrode on the lower-layer semiconductor chip and at least one first internal terminal on the package board; at least one second conductor electrically interconnecting at least one second electrode on the upper-layer semiconductor chip and at least one second internal terminal on the package board; and the package for sealing therein the lower-layer semiconductor chip, the upper-layer semiconductor chip, and the at least one first conductor and the at least one second conductor which are all on the package board.

Abstract: Semiconductor chips are arranged on a panel in matrix, scaled in a piece of synthetic resin through a transfer molding, and the resultant structure is separated into dices through a cutting operation so that small semiconductor devices are economically produced.

Abstract: A die bonder for a semiconductor producing apparatus is disclosed. The die bonder is capable of dealing with packages having a standard structure and packages having an LOC (Lead On Chip) structure, as needed.