Patents by Inventor Toshiaki Watanabe
Toshiaki Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070160150Abstract: A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.Type: ApplicationFiled: March 12, 2007Publication date: July 12, 2007Inventors: Takeshi Chujoh, Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Nagai
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Publication number: 20070147514Abstract: An alpha-map encoding apparatus includes a first down-sampling circuit (21) for down-sampling an alpha-map signal which represents the shape of an object and the position in the frame of the object at a down-sampling ratio based on size conversion ratio information, an up-sampling circuit (23) for up-sampling the alpha-map signal at an up-sampling ratio based on size conversion ratio information given to restore the down-sampled alpha-map signal to an original size, and outputting a local decoded alpha-map signal, a motion estimation/compensation circuit (25) for generating a motion estimation/compensation signal on the basis of the previous decoded video signal and a motion vector signal, a second down-sampling circuit (26) for down-sampling the motion estimation/compensation signal at the down-sampling ratio, a binary image encoder for encoding the alpha-map signal down-sampled by the first down-sampling circuit to a binary image in accordance with the motion estimation/compensation signal down-sampled by tType: ApplicationFiled: March 7, 2007Publication date: June 28, 2007Inventors: Noboru Yamaguchi, Toshiaki Watanabe, Takashi Ida, Yoshihiro Kikuchi
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Patent number: 7236530Abstract: Encoded data using reversible variable length code words is input to a forward decoder (123) to be decoded in the forward direction. When an error is detected in the encoded data in the forward decode processing, backward decode processing is started by a backward decoder (126). A decode value determination unit (125) determines a decode value by using the forward and backward decode results and the error detection positions in the encoded data in units of bits and syntax which are respectively detected in the forward decoding and the backward decoding.Type: GrantFiled: October 5, 2004Date of Patent: June 26, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Chujoh, Toshiaki Watanabe
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Patent number: 7215709Abstract: An alpha-map encoding apparatus includes a first down-sampling circuit (21) for down-sampling an alpha-map signal which represents the shape of an object and the position in the frame of the object at a down-sampling ratio based on size conversion ratio information, an up-sampling circuit (23) for up-sampling the alpha-map signal at an up-sampling ratio based on size conversion ratio information given to restore the down-sampled alpha-map signal to an original size, and outputting a local decoded alpha-map signal, a motion estimation/compensation circuit (25) for generating a motion estimation/compensation signal on the basis of the previous decoded video signal and a motion vector signal, a second down-sampling circuit (26) for down-sampling the motion estimation/compensation signal at the down-sampling ratio, a binary image encoder for encoding the alpha-map signal down-sampled by the first down-sampling circuit to a binary image in accordance with the motion estimation/compensation signal down-sampled by tType: GrantFiled: October 25, 2004Date of Patent: May 8, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Noboru Yamaguchi, Toshiaki Watanabe, Takashi Ida, Yoshihiro Kikuchi
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Publication number: 20070097170Abstract: To provide a method of effectively reducing the amount of ink droplets remaining on a nozzle surface after a cleaning operation, and an inkjet recording apparatus capable of shortening an entire processing time of an initial filling operation and a cleaning operation by shortening an ink discharge operation time. By providing a partition wall so that a suction port and an atmosphere opening port provided on a back side of a porous sheet placed in a cap are not directly communicated with each other, in an ink discharge operation in the cap, air having entered through the atmosphere opening port flows through a space between the porous sheet and the nozzle surface, and thereafter, flows to the suction port via the porous sheet. Therefore, ink droplets remaining adhering to the nozzle surface can be removed using the force of air flow.Type: ApplicationFiled: October 25, 2006Publication date: May 3, 2007Inventors: Yasuhito Sekiya, Toshiaki Watanabe
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Publication number: 20070094577Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: April 26, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Publication number: 20070094575Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: April 26, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Publication number: 20070094576Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: April 26, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Publication number: 20070094578Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: April 26, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Patent number: 7203239Abstract: Encoded data using reversible variable length code words is input to a forward decoder (123) to be decoded in the forward direction. When an error is detected in the encoded data in the forward decode processing, backward decode processing is started by a backward decoder (126). A decode value determination unit (125) determines a decode value by using the forward and backward decode results and the error detection positions in the encoded data in units of bits and syntax which are respectively detected in the forward decoding and the backward decoding.Type: GrantFiled: October 28, 2004Date of Patent: April 10, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Chujoh, Toshiaki Watanabe
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Publication number: 20070061678Abstract: In a coding system where in an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting-/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: March 15, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Publication number: 20070061679Abstract: In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: March 15, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Publication number: 20070061680Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting-/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: March 15, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Publication number: 20070061677Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting-/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: March 15, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Publication number: 20070061676Abstract: In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed-code string 201 to an error correcting-/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.Type: ApplicationFiled: October 23, 2006Publication date: March 15, 2007Applicant: Kabushiki Kaishi ToshibaInventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
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Patent number: 7184600Abstract: A video encoding apparatus is provided with a resolution converting section, an encoding section, and a transmitting section. The resolution converting section enlarges or reduces a binary picture which represents the shape of an object. The encoding section encodes a binary picture reduced by the resolution converting section. The reduction ratio used by the resolution converting section is encoded, and the transmitting section transmits this encoded reduction ratio along with encoded data on the binary picture. The amount of encoded data produced from the encoding section is controlled by changing the enlargement/reduction ratio used by the resolution converting section.Type: GrantFiled: October 26, 2004Date of Patent: February 27, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Noboru Yamaguchi, Toshiaki Watanabe, Takashi Ida, Takaaki Kuratate
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Publication number: 20070035568Abstract: The objective of the present invention is to provide an ink jet head drive method whereby the same ink discharge speed is obtained, regardless of the locations of the ink chambers that discharge ink. A second drive pulse signal having a voltage value or a pulse width at which the discharge of ink does not occur is transmitted to an actuator, at the least, provided for an ink chamber, for which the discharge of ink is enabled, that is opposite a non-print area of a recording medium adjacent to a print area.Type: ApplicationFiled: August 9, 2006Publication date: February 15, 2007Inventor: Toshiaki Watanabe
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Patent number: 7167521Abstract: An alpha-map encoding apparatus includes a first down-sampling circuit (21) for down-sampling an alpha-map signal which represents the shape of an object and the position in the frame of the object at a down-sampling ratio based on size conversion ratio information, an up-sampling circuit (23) for up-sampling the alpha-map signal at an up-sampling ratio based on size conversion ratio information given to restore the down-sampled-alpha-map signal to an original size, and outputting a local decoded alpha-map signal, a motion estimation/compensation circuit (25) for generating a motion estimation/compensation signal on the basis of the previous decoded video signal and a motion vector signal, a second down-sampling circuit (26) for down-sampling the motion estimation/compensation signal at the down-sampling ratio, a binary image encoder for encoding the alpha-map signal down-sampled by the first down-sampling circuit to a binary image in accordance with the motion estimation/compensation signal down-sampled by tType: GrantFiled: October 25, 2004Date of Patent: January 23, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Noboru Yamaguchi, Toshiaki Watanabe, Takashi Ida, Yoshihiro Kikuchi
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Patent number: 7136416Abstract: Encoded data using reversible variable length code words is input to a forward decoder (123) to be decoded in the forward direction. When an error is detected in the encoded data in the forward decode processing, backward decode processing is started by a backward decoder (126). A decode value determination unit (125) determines a decode value by using the forward and backward decode results and the error detection positions in the encoded data in units of bits and syntax which are respectively detected in the forward decoding and the backward decoding.Type: GrantFiled: October 28, 2004Date of Patent: November 14, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Chujoh, Toshiaki Watanabe
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Patent number: 7116827Abstract: A video encoding apparatus is provided with a resolution converting section, an encoding section, and a transmitting section. The resolution converting section enlarges or reduces a binary picture which represents the shape of an object. The encoding section encodes a binary picture reduced by the resolution converting section. The reduction ratio used by the resolution converting section is encoded, and the transmitting section transmits this encoded reduction ratio along with encoded data on the binary picture. The amount of encoded data produced from the encoding section is controlled by changing the enlargement/reduction ratio used by the resolution converting section.Type: GrantFiled: October 26, 2004Date of Patent: October 3, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Noboru Yamaguchi, Toshiaki Watanabe, Takashi Ida, Takaaki Kuratate