Patents by Inventor Toshie Kutsunai

Toshie Kutsunai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8907425
    Abstract: A semiconductor device has a first MIS transistor. The first MIS transistor includes a first source/drain region of a first conductivity type which includes a silicon compound layer causing a first stress in a gate length direction of a channel region in a first active region, and a stress insulating film which is formed on the first active region to cover a first gate electrode, a first sidewall, and the first source/drain region, and which causes a second stress opposite to the first stress. An uppermost surface of the silicon compound layer is located higher than a surface of a semiconductor substrate located directly under the first gate electrode. A first stress-relief film is formed in a space between the silicon compound layer and the first sidewall.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: December 9, 2014
    Assignee: Panasonic Corporation
    Inventors: Satoru Itou, Toshie Kutsunai
  • Patent number: 8604554
    Abstract: A semiconductor device includes a first and a second MIS transistor. The first and second MIS transistors include a first and a second gate electrode formed on a first and a second active region with a first and a second gate insulating film being formed therebetween, first and second sidewalls including a first and a second inner sidewall formed on side surfaces of the first and second gate electrodes and having an L-shaped cross-section, and first and second source/drain regions formed in the first and second active regions laterally outside the first and second sidewalls. The first source/drain regions include a silicon compound layer formed in trenches provided in the first active region and causes a first stress in a gate length direction of a channel region in the first active region. A width of the first inner sidewall is smaller than a width of the second inner sidewall.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: December 10, 2013
    Assignee: Panasonic Corporation
    Inventors: Satoru Itou, Hiromasa Fujimoto, Susumu Akamatsu, Toshie Kutsunai
  • Publication number: 20130015522
    Abstract: A semiconductor device includes an active region formed in a semiconductor substrate made of silicon, and surrounded by an isolation region; and a gate electrode formed on the active region and the isolation region with a gate insulating film interposed between the gate electrode and the active region or the isolation region. P-type silicon alloy layers are formed in recess regions formed in regions of the active region located laterally outward of the gate electrode, and an upper end of a portion of each of the silicon alloy layers in contact with the isolation region is located below a portion of an upper surface of the active region under the gate insulating film.
    Type: Application
    Filed: September 15, 2012
    Publication date: January 17, 2013
    Applicant: Panasonic Corporation
    Inventors: Toshie KUTSUNAI, Satoru Ito
  • Publication number: 20120256266
    Abstract: A semiconductor device has a first MIS transistor. The first MIS transistor includes a first source/drain region of a first conductivity type which includes a silicon compound layer causing a first stress in a gate length direction of a channel region in a first active region, and a stress insulating film which is formed on the first active region to cover a first gate electrode, a first sidewall, and the first source/drain region, and which causes a second stress opposite to the first stress. An uppermost surface of the silicon compound layer is located higher than a surface of a semiconductor substrate located directly under the first gate electrode. A first stress-relief film is formed in a space between the silicon compound layer and the first sidewall.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Applicant: Panasonic Corporation
    Inventors: Satoru ITOU, Toshie Kutsunai
  • Publication number: 20120146154
    Abstract: A semiconductor device includes a first and a second MIS transistor. The first and second MIS transistors include a first and a second gate electrode formed on a first and a second active region with a first and a second gate insulating film being formed therebetween, first and second sidewalls including a first and a second inner sidewall formed on side surfaces of the first and second gate electrodes and having an L-shaped cross-section, and first and second source/drain regions formed in the first and second active regions laterally outside the first and second sidewalls. The first source/drain regions include a silicon compound layer formed in trenches provided in the first active region and causes a first stress in a gate length direction of a channel region in the first active region. A width of the first inner sidewall is smaller than a width of the second inner sidewall.
    Type: Application
    Filed: February 17, 2012
    Publication date: June 14, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: SATORU ITOU, HIROMASA FUJIMOTO, SUSUMU AKAMATSU, TOSHIE KUTSUNAI
  • Publication number: 20090250787
    Abstract: A semiconductor storage device includes: a first conductive adhesive layer selectively formed over a semiconductor substrate; an insulating film formed on the semiconductor substrate to cover the first conductive adhesive layer and having an opening exposing a central part of the first conductive adhesive layer; and a capacitive element including a bottom electrode formed along a bottom surface and a wall surface of the opening, a capacitive insulating film formed on the bottom electrode, and a top electrode formed on the capacitive insulating film. The first conductive adhesive layer is in contact with the bottom electrode only at a bottom surface part of the opening which includes a corner where the bottom surface of the opening meets the wall surface thereof.
    Type: Application
    Filed: March 23, 2009
    Publication date: October 8, 2009
    Inventor: Toshie Kutsunai
  • Patent number: 7557011
    Abstract: A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least one common type of atoms for allowing the first and second hydrogen barrier films to adhere to each other.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: July 7, 2009
    Assignee: Panasonic Corporation
    Inventors: Takumi Mikawa, Yuji Judai, Toshie Kutsunai
  • Patent number: 7456455
    Abstract: A semiconductor memory device comprises: a first interlayer insulating film formed on a semiconductor substrate; a capacitor formed above the first interlayer insulating film and composed of a lower electrode, a capacitor insulating film of a high dielectric film or a ferroelectric film, and an upper electrode; a second interlayer insulating film formed over the first interlayer insulating film to cover the capacitor; a first contact plug formed in the first interlayer insulating film to penetrate the first interlayer insulating film; and a second contact plug formed in the second interlayer insulating film to penetrate the second interlayer insulating film to make connection to the first contact plug. Between the first and second contact plugs, a first oxygen barrier film is interposed to come into contact with part of the boundary area between the first and second interlayer insulating films.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: November 25, 2008
    Assignee: Panasonic Corporation
    Inventors: Toshie Kutsunai, Takumi Mikawa
  • Patent number: 7326990
    Abstract: A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least one common type of atoms for allowing the first and second hydrogen barrier films to adhere to each other.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: February 5, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Mikawa, Yuji Judai, Toshie Kutsunai
  • Patent number: 7180122
    Abstract: A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least one common type of atoms for allowing the first and second hydrogen barrier films to adhere to each other.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: February 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Mikawa, Yuji Judai, Toshie Kutsunai
  • Publication number: 20060267060
    Abstract: A semiconductor memory device comprises: a first interlayer insulating film formed on a semiconductor substrate; a capacitor formed above the first interlayer insulating film and composed of a lower electrode, a capacitor insulating film of a high dielectric film or a ferroelectric film, and an upper electrode; a second interlayer insulating film formed over the first interlayer insulating film to cover the capacitor; a first contact plug formed in the first interlayer insulating film to penetrate the first interlayer insulating film; and a second contact plug formed in the second interlayer insulating film to penetrate the second interlayer insulating film to make connection to the first contact plug. Between the first and second contact plugs, a first oxygen barrier film is interposed to come into contact with part of the boundary area between the first and second interlayer insulating films.
    Type: Application
    Filed: May 19, 2006
    Publication date: November 30, 2006
    Inventors: Toshie Kutsunai, Takumi Mikawa
  • Publication number: 20060220091
    Abstract: A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least one common type of atoms for allowing the first and second hydrogen barrier films to adhere to each other.
    Type: Application
    Filed: March 3, 2006
    Publication date: October 5, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Mikawa, Yuji Judai, Toshie Kutsunai
  • Publication number: 20060124983
    Abstract: A semiconductor device has contact plugs each for electrically connecting a capacitor element to the source/drain region of a transistor, conductive layers formed on the contact plugs and made of titanium nitride which is a nitride only of a refractory metal, and polycrystalline conductive oxygen barrier layers each composed of a multilayer structure consisting of a titanium aluminum nitride film, an iridium film, and an iridium oxide film to prevent the diffusion of oxygen. Since the conductive layers made of titanium nitride which is low in crystal orientation is provided under the oxygen barrier films, the titanium aluminum nitride films formed as the oxygen barrier films directly on the conductive layers have a compact film structure so that the penetration of oxygen is prevented effectively.
    Type: Application
    Filed: February 3, 2006
    Publication date: June 15, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshie Kutsunai, Takumi Mikawa, Yuji Judai
  • Patent number: 7060552
    Abstract: A semiconductor memory device of the present invention includes: a semiconductor substrate; a memory cell capacitor for storing data, including a first electrode provided above the semiconductor substrate, a capacitance insulating film formed on the first electrode, and a second electrode provided on the capacitance insulating film; a step reducing film covering an upper surface and a side surface of the memory cell capacitor; and an overlying hydrogen barrier film covering the step reducing film.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: June 13, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Mikawa, Toshie Kutsunai, Yuji Judai
  • Patent number: 7053436
    Abstract: A conductive oxygen barrier layer is formed on an interlayer dielectric film and patterned such that it is in contact with the top surface of a contact plug to prevent the diffusion of oxygen into the contact plug from above. The conductive oxygen barrier layer is composed of a lower layer containing a conductive nitride such as TiAlN, and an upper layer containing a conductive oxide such as IrO2. An insulative oxygen barrier layer composed of Al2O3 and having a thickness of approximately 20 nm is formed on the side surfaces of the conductive oxygen barrier layer to prevent the diffusion of oxygen into the contact plug from the sides, such as from the sides of the lower layer of the conductive barrier layer.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: May 30, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Nagano, Toshie Kutsunai
  • Publication number: 20060079066
    Abstract: A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least one common type of atoms for allowing the first and second hydrogen barrier films to adhere to each other.
    Type: Application
    Filed: November 17, 2005
    Publication date: April 13, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Mikawa, Yuji Judai, Toshie Kutsunai
  • Patent number: 6963095
    Abstract: The ferroelectric memory device has a plurality of capacitor elements each formed on a semiconductor substrate and composed of a lower electrode, a capacitor insulating film made of a ferroelectric material formed on the lower electrode, and an upper electrode formed on the capacitor insulating film. Each of the lower electrodes is buried in a burying insulating film to have an upper surface planarized relative to the upper surface of the burying insulating film and has a plane configuration such that the distance from an arbitrary position on the upper surface of the lower electrode to the nearest end portion thereof is 0.6 ?m or less.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: November 8, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Mikawa, Toshie Kutsunai, Yuji Judai
  • Patent number: 6939725
    Abstract: A capacitor including a capacitor lower electrode, a capacitor dielectric film of a highly dielectric film or a ferroelectric film and a capacitor upper electrode is formed on a semiconductor substrate. A protection film is formed on the semiconductor substrate so as to cover the capacitor. A first TEOS film having a relatively large water content is formed on the protection film through first TEOS-O3 CVD where an ozone concentration is relatively low. A second TEOS-O3 film having a relatively small water content is formed on the first TEOS-O3 film through second TEOS-O3 CVD where the ozone concentration is relatively high.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: September 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshie Kutsunai, Shinichiro Hayashi, Yuji Judai, Yoshihisa Nagano
  • Publication number: 20050087788
    Abstract: A semiconductor device has contact plugs each for electrically connecting a capacitor element to the source/drain region of a transistor, conductive layers formed on the contact plugs and made of titanium nitride which is a nitride only of a refractory metal, and polycrystalline conductive oxygen barrier layers each composed of a multilayer structure consisting of a titanium aluminum nitride film, an iridium film, and an iridium oxide film to prevent the diffusion of oxygen. Since the conductive layers made of titanium nitride which is low in crystal orientation is provided under the oxygen barrier films, the titanium aluminum nitride films formed as the oxygen barrier films directly on the conductive layers have a compact film structure so that the penetration of oxygen is prevented effectively.
    Type: Application
    Filed: October 19, 2004
    Publication date: April 28, 2005
    Inventors: Toshie Kutsunai, Takumi Mikawa, Yuji Judai
  • Publication number: 20050082638
    Abstract: A semiconductor device includes: a capacitor provided on a supporting substrate having an integrated circuit thereon and including a lower electrode, a dielectric film, and an upper electrode; a first interlayer insulating film provided so as to cover the capacitor; a first interconnect selectively provided on the first interlayer insulating film and electrically connected to the integrated circuit and the capacitor through a first contact hole formed in the first interlayer insulating film; a second interlayer insulating film formed of ozone TEOS and provided so as to cover the first interconnect; a second interconnect selectively provided on the second interlayer insulating film and electrically connected to the first interconnect through a second contact hole formed in the second interlayer insulating film; and a passivation layer provided so as to cover the second interconnect.
    Type: Application
    Filed: October 19, 2004
    Publication date: April 21, 2005
    Inventors: Yoshihisa Nagano, Toshie Kutsunai, Yuji Judai, Yasuhiro Uemoto, Eiji Fujii