Abstract: According to one embodiment, A system includes a first LSI, a second LSI, a controller and a current monitoring and determination module. The first LSI operates on a first power supply voltage generated by a first voltage regulator included in the second LSI. The module operates on a device power supply voltage supplied from the device power supply. The module monitors current flowing between the first LSI and the first voltage regulator, determines an abnormality in the first LSI on the basis of the current monitoring result and transmits an abnormality signal to the controller on the basis of the abnormality determination result. The controller operates on a second power supply voltage generated by a second voltage regulator included in the second LSI and reports an abnormality in the first LSI to a host system in accordance with the reception of the abnormality signal.

Abstract: An integrated circuit has an analog output circuit for outputting an analog signal and a leadless terminal for connecting an output line of the analog output circuit to a circuit board by soldering, and measures and transfers an analog output voltage of the leadless terminal in a state in which it is mounted on the circuit board. A measuring unit has a switching unit for connecting the analog output circuit to the measuring unit upon failure diagnosis, and an AD converter for measuring the analog output voltage of the leadless terminal in a failure diagnosis state obtained by the switching unit; and causes the analog output voltage of the leadless terminal to be determined whether it is a normal voltage or an abnormal voltage by transferring the voltage measured by the AD converter to a determination unit through serial transfer.

Abstract: An apparatus that controls a head that reads data from and writes data to a recording medium of which a spinning speed is controlled based on a clock signal includes a clock-error detecting unit that detects an error in the clock signal, and a head-retraction control unit that controls the head in such a way that the head is safely retracted when the error is detected by the clock-error detecting unit.

Abstract: An integrated circuit has an analog output circuit for outputting an analog signal and a leadless terminal for connecting an output line of the analog output circuit to a circuit board by soldering, and measures and transfers an analog output voltage of the leadless terminal in a state in which it is mounted on the circuit board. A measuring unit has a switching unit for connecting the analog output circuit to the measuring unit upon failure diagnosis, and an AD converter for measuring the analog output voltage of the leadless terminal in a failure diagnosis state obtained by the switching unit; and causes the analog output voltage of the leadless terminal to be determined whether it is a normal voltage or an abnormal voltage by transferring the voltage measured by the AD converter to a determination unit through serial transfer.

Abstract: An apparatus that controls a head that reads data from and writes data to a recording medium of which a spinning speed is controlled based on a clock signal includes a clock-error detecting unit that detects an error in the clock signal, and a head-retraction control unit that controls the head in such a way that the head is safely retracted when the error is detected by the clock-error detecting unit.

Abstract: An actuator assembly including an actuator arm, a suspension fixed to a front end portion of the actuator arm, and a head slider mounted on a front end portion of the suspension and having a magnetoresistive element. The suspension has a pair of first lead lines each of which has one end connected to the magnetoresistive element, and an easily removable short-circuit pattern for connecting the first lead lines with each other. The actuator assembly further includes a main FPC fixed at one end portion thereof to the actuator arm, and an interconnection FPC having a plurality of second lead lines for interconnecting the first lead lines and a wiring pattern of the main FPC. The interconnection FPC further has a plurality of ground lines for electrically connecting the second lead lines to the actuator arm. In using the actuator assembly in a magnetic disk drive, the short-circuit pattern is fused and each ground line is cut.

Abstract: A seek control apparatus for a disk apparatus includes the steps of performing a seek operation in which a head (6) is moved from a first position on a recording medium to a second position under control of a processor (4) receiving a first command from an external device (113, 116, 117), and setting a load state of the processor to a state where the processor can accept a command during executing the step (E). Then it is determined whether or not a second command has been supplied to the processor from the external device during a time the step is being executed (121). The seek operation is stopped between the first position and the second position when it is determined by the just above step that the second command has been supplied to the processor (121, 122, 123, 125).

Abstract: Disclosed is a synchronizing signal switching system for synchronizing operations of a plurality of disk devices without stopping the system operation even when a currently used synchronizing signal is stopped or deviated from standard. To this end, each disk device comprises a disk unit and a synchronizing signal switching unit for generating a synchronizing signal to be supplied to the disk unit. One of the disk devices is a current master disk device for currently supplying a master synchronizing signal and another one of the disk devices is a next master disk device. The disk devices are connected in a sequence to form a loop through which the master synchronizing signal is transmitted. The synchronizing signal switching unit in each of the disk devices is provided with an inheritance order to become the current master disk device or the next master disk device.

Abstract: A delay circuit which compensates for a variable phase output of an index signal by delaying the read out index signal. The delay time of the delay circuit depends on the cylinder on which a read/write head is located, and is chosen so that the delayed index signals are generated at an essentially constant phase angle with respect to a reference angular position. The delay circuit may include a counter which is pre-loaded with an address of the cylinder on which the head is located, and which counts number of clock pulses input to the counter. Overflowing of the counter generates the compensated index signal. Thus, synchronous operation of plural disk apparatus is accomplished, when the head seeks a new cylinder.

Abstract: A magnetic disk storage apparatus in which a plurality of magnetic head positioners are independently driven with respect to each other. A housing having a sensor secured thereto indirectly senses mechanical vibration of a magnetic disk and issues a sense signal. The mechanical vibration is inevitably caused by a seek operation of a selected magnetic head positioner. Based on the sense signal, a compensating signal is generated in a mechanical vibration follow-up system disposed in the apparatus. The compensating signal is input to a coil of a driving motor of non-selected magnetic head positioners such that the effect of the mechanical vibration on the other positioners is cancelled. Thus, magnetic heads supported by the other positioners do not become off-track.