Patents by Inventor Toshifumi Mitsumune

Toshifumi Mitsumune has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5717780
    Abstract: A checking apparatus for flat type display panels includes a multiple number of cameras used for picking up images of a check pattern that is generated by a check pattern generator in accordance with a check item and displayed on a liquid crystal panel and a high-speed image processor for processing the obtained image signal from the taken image so as to detect defects in accordance with the check item. Further, the apparatus is constructed such that, as to some check items, the area of the display panel is divided into a multiple number of sections and a multiple number of check patterns are displayed at the same time in respective sections to thereby perform checking on multiple check items simultaneously. Alternatively, the apparatus is constructed such that, checking as to some check items is performed by processing image signals obtained in only a previously designated part of the liquid crystal panel.
    Type: Grant
    Filed: July 21, 1995
    Date of Patent: February 10, 1998
    Assignees: Sharp Kabushiki Kaisha, Yokogawa ADS Corporation
    Inventors: Toshifumi Mitsumune, Kengo Tanaka, Toshiaki Tanaka
  • Patent number: 4930874
    Abstract: A liquid crystal display device utilizing an insulating substrate, a plurality of transparent electrodes disposed on the insulating substrate in a matrix fashion to form a plurality of pixels, and at least two thin film transistors disposed in the vicinity of each of the transparent electrodes on the insulating substrate, each the thin film transistor having a drain electrode, a source electrode and a gate electrode. The drain electrode is connected to the transparent electrode, a gate electrode line for each line or column of the transparent electrodes is disposed on the insulating substrate in the vicinity thereof and each gate electrode of the thin film transistors connected to each of the transparent electrodes of the line or column are connected in common thereto. The source electrode lines for each column or line of the transparent electrodes are disposed on the insulating substrate in the vicinity thereof and at a right angle to the gate electrode line.
    Type: Grant
    Filed: September 28, 1988
    Date of Patent: June 5, 1990
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshifumi Mitsumune, Hiroshi Take, Kiyoshi Nakazawa