Patents by Inventor Toshifumi Sano

Toshifumi Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936514
    Abstract: A processing apparatus includes a virtualization control unit configured to virtualize hardware, and a network providing unit configured to provide a network function by using a resource virtualized by the virtualization control unit.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: March 19, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kotaro Mihara, Toshifumi Sano, Nobuhiro Kimura, Minoru Sakuma
  • Patent number: 11652683
    Abstract: A failure notification system includes a logical configuration provider which provides logical configurations in which a plurality of types of hardware are virtualized, a processor using logical configurations provided from the logical configuration provider, and a failure notifier which notifies the processor 3 of a failure in the logical configuration provider. A notifier includes a storage device 10 which stores hardware configuration data in which an ID of the hardware is associated with an ID of a logical configuration corresponding to the hardware, a logical configuration identifier which identifies a logical configuration corresponding to hardware from which a failure is detected from the hardware configuration data when a failure in the hardware is detected, and a notifier which notifies the processor of occurrence of a failure in the logical configuration identified by the logical configuration identifier.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: May 16, 2023
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kotaro Mihara, Toshifumi Sano, Nobuhiro Kimura
  • Publication number: 20220321399
    Abstract: A processing apparatus (1) includes a virtualization control unit (110) configured to virtualize hardware, and a network providing unit (120) configured to provide a network function by using a resource virtualized by the virtualization control unit (110).
    Type: Application
    Filed: August 20, 2019
    Publication date: October 6, 2022
    Inventors: Kotaro MIHARA, Toshifumi SANO, Nobuhiro KIMURA, Minoru Sakuma
  • Publication number: 20220103416
    Abstract: In a processor using logical configurations in which a plurality of types of hardware are virtualized, a failure in a logical configuration is appropriately ascertained. A failure notification system 5 includes a logical configuration provider 2 which provides logical configurations in which a plurality of types of hardware are virtualized, a processor 3 using logical configurations provided from the logical configuration provider 2, and a failure notifier 1 which notifies the processor 3 of a failure in the logical configuration provider 2.
    Type: Application
    Filed: January 22, 2020
    Publication date: March 31, 2022
    Inventors: Kotaro MIHARA, Toshifumi SANO, Nobuhiro KIMURA
  • Patent number: 5589711
    Abstract: In a semiconductor package comprising a heat spreader, a heat sink, a wiring board, and a connector, a heat spreader mounted on a remaining region of the upper surface of a substrate. The heat sink is thermally connected to a primary integrated circuit chip through the heat spreader and to a secondary integrated circuit chip. The heat sink has electrical conductivity. The heat sink comprises a base plate and at least one connecting member which perpendicularly extends from the base plate. A wiring board has a plurality of contact holes and a plurality of contact slits. A connector is mounted on the wiring board. The connector has a plurality of contacts. The contacts comprises a plurality of socket portions and a plurality of terminal portions. The contacts are connected to an input/output pins with the input/output pins inserted into the respective socket portions. The terminal portions are inserted into the respective contact holes. The connector has at least one ground contact.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: December 31, 1996
    Assignees: NEC Corporation, Japan Aviation Electronics Industry, Limited
    Inventors: Toshifumi Sano, Masahiro Yamada, Yoshiaki Umezawa, Yoshikatsu Okada, Akira Natori
  • Patent number: 5384687
    Abstract: A cooling structure is used for forced cooling of an electronic circuit package. The cooling structure has a bottom heat radiation plate on which the electronic circuit package is mounted, a nozzle for jetting coolant toward the bottom heat radiation plate, a first vertical heat radiation plate mounted on the bottom heat radiation plate and disposed so as to surround the nozzle openings are formed in the first vertical heat radiation plate for again jetting coolant jetted from the nozzle. A second vertical heat radiation plate is mounted on the bottom heat radiation plate and is disposed so as to surround the first vertical heat radiation plate at least in an opposing relationship to the openings. The coolant jetted from the openings collides with and removes heat from the second vertical heat radiation plate.
    Type: Grant
    Filed: September 29, 1993
    Date of Patent: January 24, 1995
    Assignee: NEC Corporation
    Inventor: Toshifumi Sano
  • Patent number: 5014777
    Abstract: A cooling structure which includes a substrate, at least one heat generating member fixed on the substrate, a heat radiating member provided above the heat generating member, and an elastic heat transfer sheet provided between the heat generating member and the heat radiating member for conducting heat generated in the heat generating member to the heat radiating member, with either the heat radiating member being formed with grooves at least on the part opposite the heat generating member, or the at least one heat generating member being formed with grooves on the upper portion thereof, or the elastic heat transfer sheet being formed with grooves on either one of the surface opposite the heat generating member or the surface opposite the heat radiating member.
    Type: Grant
    Filed: September 19, 1989
    Date of Patent: May 14, 1991
    Assignee: NEC Corporation
    Inventor: Toshifumi Sano
  • Patent number: 4854377
    Abstract: A cooling system for integrated circuit chips comprises a substrate, a plurality of integrated circuit chips mounted on a first surface of the substrate and a second surface opposite to the first surface thereof, a heat conductive means having a first surface and a second, flat surface opposite to the first surface, a layer of thermally conductive bonding material between the second surface of the substrate and the first surface of the heat conductive means, and a heat exchanger having a flat surface and provided with inlet and outlet means to permit liquid coolant to flow through the heat exchanger in contact with the flat surface. The heat exchanger is removably mounted to the heat conductive means with the flat surface thereof being in close proximity to the second surface of the heat conductive means.
    Type: Grant
    Filed: November 18, 1986
    Date of Patent: August 8, 1989
    Assignee: NEC Corporation
    Inventors: Mitsuo Komoto, Youichi Matsuo, Toshifumi Sano