Abstract: Provided is an array substrate. The array substrate includes a base substrate, a gate line, a data line, a discharge line, a first pixel electrode, a first thin film transistor, a second thin film transistor and a first connection line. A control electrode of the first thin film transistor and a control electrode of the second thin film transistor are both connected to the gate line. The first electrode of the first thin film transistor is connected to the data line. Both the second electrode of the first thin film transistor and the first electrode of the second thin film transistor are connected to the first pixel electrode by the first connection line. The second electrode of the second thin film transistor is connected to the discharge line.

Abstract: Provided is an array substrate. The array substrate includes a base substrate, a gate line, a data line, a discharge line, a first pixel electrode, a first thin film transistor, a second thin film transistor and a first connection line. A control electrode of the first thin film transistor and a control electrode of the second thin film transistor are both connected to the gate line. The first electrode of the first thin film transistor is connected to the data line. Both the second electrode of the first thin film transistor and the first electrode of the second thin film transistor are connected to the first pixel electrode by the first connection line. The second electrode of the second thin film transistor is connected to the discharge line.

Abstract: An array substrate and a display apparatus are provided. The array substrate includes: a substrate (1); a first common electrode layer (2) on a side of the substrate (1); and a pixel electrode layer (3) on a side of the first common electrode layer (2) away from the substrate (1), including a plurality of pixel electrode rows (30) extending along a first direction (X) and arranged along a second direction (Y). The pixel electrode row (30) includes a plurality of pixel electrodes (31) arranged along the first direction (X). Part of regions of the pixel electrodes (31) is a slit structure (310) and part of regions of the pixel electrodes is a block structure, and in the same pixel electrode row (30), the slit structures (310) of adjacent pixel electrodes (31) are located at different positions in the adjacent pixel electrodes (31).

Abstract: Provided is an array substrate. The array substrate includes a base substrate, a gate line, a data line, a discharge line, a first pixel electrode, a first thin film transistor, a second thin film transistor and a first connection line. A control electrode of the first thin film transistor and a control electrode of the second thin film transistor are both connected to the gate line. The first electrode of the first thin film transistor is connected to the data line. Both the second electrode of the first thin film transistor and the first electrode of the second thin film transistor are connected to the first pixel electrode by the first connection line. The second electrode of the second thin film transistor is connected to the discharge line.

Abstract: A liquid crystal display device includes first and second substrates and a vertically-aligned liquid crystal layer. The first substrate includes a pixel electrode and a first alignment film. The second substrate includes a counter electrode and a second alignment film. The first alignment film has, within each pixel, first and second pretilt regions that define first and second pretilt directions, respectively, that are antiparallel to each other. The second alignment film has, within each pixel, third and fourth pretilt regions that define third and fourth pretilt directions, respectively, that are antiparallel to each other. At least either a surface of the first substrate or a surface of the second substrate has a groove formed so as to overlap at least either a boundary between the first and second pretilt regions or a boundary between the third and fourth pretilt regions when seen from a direction normal to a display surface.

Abstract: An active matrix substrate includes a peripheral circuit including a first TFT disposed in a non-display region and a capacitance portion, and a lower transparent electrode and an upper transparent electrode disposed in each pixel. The active matrix substrate includes a gate metal layer including a gate electrode of the first TFT, a source metal layer including a source electrode of the first TFT, a lower transparent conductive layer positioned above the gate metal layer and the source metal layer and including the lower transparent electrode, and an upper transparent conductive layer including the upper transparent electrode. The capacitance portion includes a first capacitor including a first lower capacitance electrode formed in the lower transparent conductive layer, a first upper capacitance electrode formed in the upper transparent conductive layer, and a portion positioned between these capacitance electrodes in a dielectric layer.

Abstract: An active matrix substrate includes a peripheral circuit including a first TFT disposed in a non-display region and a capacitance portion, and a lower transparent electrode and an upper transparent electrode disposed in each pixel. The active matrix substrate includes a gate metal layer including a gate electrode of the first TFT, a source metal layer including a source electrode of the first TFT, a lower transparent conductive layer positioned above the gate metal layer and the source metal layer and including the lower transparent electrode, and an upper transparent conductive layer including the upper transparent electrode. The capacitance portion includes a first capacitor including a first lower capacitance electrode formed in the lower transparent conductive layer, a first upper capacitance electrode formed in the upper transparent conductive layer, and a portion positioned between these capacitance electrodes in a dielectric layer.

Abstract: A liquid crystal display device includes first and second substrates and a vertically-aligned liquid crystal layer. The first substrate includes a pixel electrode and a first alignment film. The second substrate includes a counter electrode and a second alignment film. The first alignment film has, within each pixel, first and second pretilt regions that define first and second pretilt directions, respectively, that are antiparallel to each other. The second alignment film has, within each pixel, third and fourth pretilt regions that define third and fourth pretilt directions, respectively, that are antiparallel to each other. At least either a surface of the first substrate or a surface of the second substrate has a groove formed so as to overlap at least either a boundary between the first and second pretilt regions or a boundary between the third and fourth pretilt regions when seen from a direction normal to a display surface.

Abstract: A liquid crystal display device (100) according to the present invention includes a plurality of pixels arrayed in a matrix, n number of the pixels (n is an even number of 4 or greater) being included in a color display pixel (CP). The liquid crystal display device includes an active matrix substrate (10) including a plurality of scanning lines (12) extending in a row direction and a plurality of signal lines (13) extending in a column direction; and a signal line driving circuit (3) that supplies, as a display signal, a gray scale voltage of a positive or negative polarity to each of the plurality of signal lines. The plurality of signal lines include a first type of signal line (13a) which does not intersect another signal line, and a second type of signal line (13b) which intersects a signal line adjacent thereto outside a display area in the state where an insulating film (16) is interposed therebetween.

Abstract: A liquid crystal display device (100) according to the present invention includes a plurality of pixels arrayed in a matrix, n number of the pixels (n is an even number of 4 or greater) being included in a color display pixel (CP). The liquid crystal display device includes an active matrix substrate (10) including a plurality of scanning lines (12) extending in a row direction and a plurality of signal lines (13) extending in a column direction; and a signal line driving circuit (3) that supplies, as a display signal, a gray scale voltage of a positive or negative polarity to each of the plurality of signal lines. The plurality of signal lines include a first type of signal line (13a) which does not intersect another signal line, and a second type of signal line (13b) which intersects a signal line adjacent thereto outside a display area in the state where an insulating film (16) is interposed therebetween.

Abstract: An active matrix substrate includes: storage capacitor wirings (18); a Cs trunk wiring (50) connected with the storage capacitor wirings via contact holes (48) provided in a non-display region (44); scanning signal lines (16) provided in the same layer as the storage capacitor wirings (18) and crossing the Cs trunk wiring (50) in the non-display region (44); an insulating layer between the storage capacitor wirings (18) and the Cs trunk wiring (50) which includes: a through-bore portion for forming the contact hole (48); a first film thickness portion (53) adjacent to the through-bore portion; and a second film thickness portion which is thicker than the first film thickness portion (53) and situated at least in the intersections of the storage capacitor wirings (18) with the Cs trunk wiring (50).

Abstract: An active matrix substrate (12) includes a substrate, a TFT (24) formed on the substrate, a storage capacitor element (20) formed on the substrate, an interlayer insulating film covering the storage capacitor element (20), and a pixel electrode (21) formed on the interlayer insulating film. The storage capacitor element (20) includes a storage capacitor line (27), an insulating film formed on the storage capacitor line (27), and two or more storage capacitor electrodes (25a, 25b, 25c) opposed to the storage capacitor line (27) with the insulating film interposed therebetween. The two or more storage capacitor electrodes (25a, 25b, 25c) are electrically connected via associated contact holes (26a, 26b, 26c) formed in the interlayer insulating film to the pixel electrode (21) and electrically continuous with a drain electrode of the TFT (24).

Abstract: The present invention provides an active matrix substrate of comprising on the substrate: a plurality of scanning signal lines and data signal lines; a thin film transistor provided at an intersecting point of the signal lines and comprising a gate electrode connected to the scanning signal line, a source electrode connected to the data signal line; and a pixel electrode electrically connected to a drain electrode of the thin film transistor, wherein the active matrix substrate comprises a structure having an at least partly multilinear data signal line and an interconnection electrode for correction.

Abstract: After forming a gate electrode (4a) in a first step, a gate insulating film (5), a semiconductor film (8) and a conducting film (12) including a transparent conducting film (9) are stacked, and on the thus obtained multilayered body (18), a resist pattern (13a) including a first opening (14a) for exposing the conducting film (12) therein and a second opening (14b) having a bottom portion (B) above the gate electrode (4a) is formed. Portions of the conducting film (12) and the semiconductor film (8) exposed in the first opening (14a) are etched, the bottom portion (B) of the second opening (14b) is removed for exposing the conducting film (12) therein, and the exposed conducting film (12) is etched, so as to form a TFT (20) in a second step. A pixel electrode (5a), a protection masking layer (17a) and a projection (17b) are formed in a third step.

Abstract: A color filter substrate for a liquid crystal display device includes a color layer, a photo spacer and a counter electrode disposed on the substrate, and an alignment control protrusion is disposed on the counter electrode for controlling alignment of liquid crystal. A manufacturing method for the color filter substrate includes the step of forming an opening by laser irradiation in a region of the counter electrode corresponding to an absent portion occurring in the alignment control protrusion. The manufacturing method is also applicable to an active matrix substrate for a liquid crystal display device. The manufacturing method can effectively correct a defect if one occurs in the alignment control protrusion.

Abstract: The active matrix substrate of the present invention is the active matrix substrate in which the faulty connection in a storage capacitor element as caused by a short circuit between storage capacitor electrodes due to a conductive foreign material or a pinhole in an insulating layer or by a short circuit between a data signal line and a storage capacitor upper electrode can be repaired with ease.

Abstract: An active matrix substrate includes a thin film transistor, a scanning signal line, and a data signal line disposed on the substrate. A gate electrode of the transistor is connected to the scanning signal line, a source electrode thereof is connected to the data signal line, and a drain electrode thereof is connected to a pixel electrode; and an upper electrode is disposed so as to oppose a storage capacitor wiring pattern at least via an insulating layer. Within a pixel region, the upper electrode includes three divided electrodes in a region opposing the storage capacitor wiring pattern, and a central divided electrode of the three divided electrodes has the smallest area.

Abstract: A color filter substrate and a liquid crystal display apparatus include, on a substrate: a colorized layer including color layers; a stacked layer protruding in comparison with the colorized layer; an opposing electrode covering the colorized layer and the stacked layer; an alignment layer formed at least on a part of the opposing electrode covering the colorized layer; and an insulating layer stacked on an entire surface of another part of the opposing electrode covering the stacked layer. With this, the short circuit between the opposing electrode and a pixel electrode is prevented, so that a color filter substrate, a liquid crystal display apparatus including the color filter substrate, and a method of manufacturing the color substrate, those being able to improve the yield of the liquid crystal display apparatus, are provided.

Abstract: An active matrix substrate suppresses reduction in production yield and increase in production steps and simultaneously permits both sufficient securing of a storage capacity and improvement of an aperture ratio of a pixel. The active matrix substrate is an active matrix substrate and includes a thin film transistor disposed at an intersection of a scanning signal line with a data signal line on a substrate, the thin film transistor including a gate electrode connected to the scanning signal line, a source electrode connected to the data signal line, and a drain electrode connected to a drain lead-out wiring; a storage capacitor upper electrode connected to the drain lead-out wiring and a pixel electrode; and a storage capacitor wiring overlapping with the storage capacitor upper electrode through an insulating film, wherein the storage capacitor wiring has an extending portion overlapping with the drain lead-out wiring through the insulating film.

Abstract: A method of manufacturing an active matrix substrate prevents an increase in the number of production steps while simultaneously preventing electrostatic discharge at a TFT channel. The method preferably includes the steps of forming a short-circuit wiring for connecting a data signal line or a source electrode to a drain electrode or a drain side circuit; successively forming an upper insulating film having an opening for short-circuit wiring separation and a transparent conductive film at a region above the short-circuit wiring as upper layers of the short-circuit wiring; and removing at least the transparent conductive film inside the opening for short-circuit wiring separation and the short-circuit wiring below the opening for short-circuit wiring separation to perform patterning of the pixel electrode and separation of the short-circuit wiring in the same step.