Abstract: In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper is removed. The ion stopper does not remain in the interlayer insulating film lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper, and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer. The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

Abstract: In an organic electroluminescence (EL) display, a TFT (40) and an organic EL element (60) are formed on an insulating substrate (10) such as a glass substrate. The contact portion between the first electrode region (e.g. the source 43s) of the active layer (43) of the TFT (40) and the organic EL element (60) is formed of a laminated structure. The laminated structure is formed of the structure stacked in layers with p-si forming the source (43s), a refractory metal (Mo), aluminum, a refractory metal (Mo), and ITO forming the anode 61. The reliable contact between the source 43s and the anode 61 can prevent variations in brightness and early degradation in characteristic of the TFT 40 and the organic EL element 60.

Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Abstract: On an insulating substrate, there are formed a first gate electrode, a gate insulating film, a semiconductor film, and an interlayer insulating film. Above the interlayer insulating film, a TFT is formed having a second gate electrode connected to the first gate electrode. Then, a photosensitive resin is formed over the entire surface of the extant layers. Subsequently, first exposure is applied using a first mask, and second exposure is then applied using a second mask with a larger amount of light than used for the first exposure. The second mask has an opening at a position corresponding to a source. Thereafter, the photosensitive resin film is developed thereby forming a contact hole and a concave.

Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Abstract: In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

Abstract: On an insulating substrate (10), there are formed a first gate electrode (11), a gate insulating film (12), a semiconductor film (13), and an interlayer insulating film (15). Above the interlayer insulating film (15), a TFT is formed having a second gate electrode (17) connected to the first gate electrode (11). Then, a photosensitive resin (70) is formed over the entire surface of the extant layers. Subsequently, first exposure (75) is applied using a first mask (71), and second exposure (76) is then applied using a second mask (72) with a larger amount of light than used for the first exposure. The second mask (72) has an opening at a position corresponding to a source (13s). Thereafter, the photosensitive resin film (70) is developed thereby forming a contact hole (73) and a recess (74).

Abstract: On an insulating substrate, there are formed a first gate electrode, a gate insulating film, a semiconductor film, and an interlayer insulating film. Above the interlayer insulating film, a TFT is formed having a second gate electrode connected to the first gate electrode. Then, a photosensitive resin is formed over the entire surface of the extant layers. Subsequently, first exposure is applied using a first mask, and second exposure is then applied using a second mask with a larger amount of light than used for the first exposure. The second mask has an opening at a position corresponding to a source. Thereafter, the photosensitive resin film is developed thereby forming a contact hole and a concave.

Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Abstract: A gate electrode, silicon nitride film, silicon oxide film and silicon film are formed on an insulating substrate. A silicon oxide film and silicon nitride film are formed on the silicon film, and first and second contact holes are formed which penetrate these films. An electrode in contact with a drain area is arranged via the first contact hole. The whole is covered with a plagiarizing film, a third contact hole of smaller diameter than that of the second contact hole is formed corresponding to the second contact hole embedded by the planarizing film, and a transparent electrode in direct contact with a source area is arranged via the third contact hole. In this way, the contact resistance between the transparent electrode and the source area is reduced, and a simplified construction display device is obtained wherein the contact reliability of both electrodes is improved.

Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Abstract: A liquid crystal display unit is described, which includes a first substrate, a second substrate opposing to the first substrate, pixel driving elements, first and second insulation layers, a planarizing film and a liquid crystal layer. The pixel driving elements are disposed on the first substrate and between the first and second substrates. The first insulation layer is deposited over the first substrate and the pixel driving elements. The planarizing film is formed on the first insulation layer. This planarizing film provides a substantially flat surface over the first substrate to minimize a height of a step present between an area corresponding to each pixel driving element and an area locating adjacent to the pixel driving element on the first substrate. The second insulation layer is formed on the planarizing film. The display electrodes are formed on the second insulation layer and electrically connected to the pixel driving elements, respectively.