Patents by Inventor Toshifumi Yamashita

Toshifumi Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170873
    Abstract: A connector system (1) is provided with a cable-side connector (10) to be connected to an end part of a cable (11) and a plurality of types of board-side connectors (110, 210) to be connected to a circuit board. The cable-side connector (10) includes a cable-side inner conductor (12), a cable-side outer conductor (13) and a cable-side connector housing (14). Each of the plurality of types of board-side connectors (110, 210) includes a board-side inner conductor (113, 213), a board-side outer conductor (111, 211) and a board-side connector housing (114, 214). The plurality of types of board-side connectors (110, 210) include mutually different board-side outer conductors (111, 211). One board-side connector selected from the plurality of types of board-side connectors (110, 210) is connected to the cable-side connector (10).
    Type: Application
    Filed: June 29, 2022
    Publication date: May 23, 2024
    Inventors: Masanao YAMASHITA, Toshifumi ICHIO, Hiroaki ITO, Maika IDO, Hidekazu MATSUDA, Kazuki HIRAMATSU, Taiga KADOYAMA
  • Publication number: 20240121529
    Abstract: To provide a solid-state imaging device and an electronic apparatus capable of achieving both of a high dynamic range operation and an auto focus operation in a pixel configuration in which a plurality of unit pixels includes two or more subpixels. There is provided a solid-state imaging device including: a first pixel separation region that separates a plurality of unit pixels including two or more subpixels; a second pixel separation region that separates each of the plurality of unit pixels separated by the first pixel separation region; and an overflow region that causes signal charges accumulated in the subpixels to overflow to at least one of adjacent subpixels, in which the overflow region is formed between a first subpixel and a second subpixel.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: HIROFUMI YAMASHITA, SHOHEI SHIMADA, YUSUKE OTAKE, YUSUKE TANAKA, TOSHIFUMI WAKANO
  • Patent number: 11937002
    Abstract: Provided is a solid-state imaging device and an electronic apparatus capable of achieving both of a high dynamic range operation and an auto focus operation in a pixel configuration in which a plurality of unit pixels includes two or more subpixels. The solid-state imaging device includes a first pixel separation region that separates a plurality of unit pixels including two or more subpixels, a second pixel separation region that separates each of the plurality of unit pixels separated by the first pixel separation region and an overflow region that causes signal charges accumulated in the subpixels to overflow to at least one of adjacent subpixels, in which the overflow region is formed between a first subpixel and a second subpixel.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: March 19, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hirofumi Yamashita, Shohei Shimada, Yusuke Otake, Yusuke Tanaka, Toshifumi Wakano
  • Publication number: 20210115964
    Abstract: Provided is a washer which aims at the realization of prevention of loosening of a screw at a high level by enhancing a frictional force between a male screw and a female screw hole or a nut while maintaining advantageous effects of a plain washer and a spring washer with a simple structure. The washer 1 according to the present invention includes a body portion 1a having a dome shape in an external appearance. A screw insertion hole 2 is formed in the body portion 1a. The body portion 1a is formed of a spring member which is deformable into an approximately flat plate shape by a pressing force in a vertical direction, and is inclined toward one side when the washer 1 is deformed into a plate shape.
    Type: Application
    Filed: April 7, 2019
    Publication date: April 22, 2021
    Inventor: Toshifumi YAMASHITA
  • Patent number: 10710034
    Abstract: A gas mixing apparatus includes: a discharge port of gas provided near conduit space through which the high-viscosity material can flow; a piston pump including a cylinder that can communicate with the conduit space through the discharge port, a piston arranged inside the cylinder, and a drive device for moving the piston between a top dead center and a bottom dead center inside the cylinder; a discharge valve that opens and closes the discharge port; and a suction valve that opens and closes a suction port of the gas into a cylinder space, in which the cylinder forms the cylinder space having a predetermined volume when the piston is located at the top dead center, and in which a tip of the piston approaches the discharge port when the piston is moved toward the bottom dead center.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: July 14, 2020
    Assignee: SUNSTAR ENGINEERING INC.
    Inventors: Takayoshi Nakanishi, Toshifumi Yamashita, Takuro Omachi, Hiroyuki Nagata
  • Publication number: 20180264421
    Abstract: A gas mixing apparatus includes: a discharge port of gas provided near conduit space through which the high-viscosity material can flow; a piston pump including a cylinder that can communicate with the conduit space through the discharge port, a piston arranged inside the cylinder, and a drive device for moving the piston between a top dead center and a bottom dead center inside the cylinder; a discharge valve that opens and closes the discharge port; and a suction valve that opens and closes a suction port of the gas into a cylinder space, in which the cylinder forms the cylinder space having a predetermined volume when the piston is located at the top dead center, and in which a tip of the piston approaches the discharge port when the piston is moved toward the bottom dead center.
    Type: Application
    Filed: February 5, 2016
    Publication date: September 20, 2018
    Inventors: Takayoshi NAKANISHI, Toshifumi YAMASHITA, Takuro OMACHI, Hiroyuki NAGATA
  • Patent number: 7036058
    Abstract: Each chip includes, in addition to a core logic, a register such as a BSR. A TAPC for controlling the register is provided only on a chip of the first stage, and an test commands/data output and input signal lines for the boundary scan test are connected to each other via wire to form a loop. Other signal lines used in the test are distributed from an output signal line of the chip of the first stage. As a result, the test needs to be carried out only once with a smaller number of pins and the number of steps and area can be reduced in chips not provided with TAPC. With this arrangement, in a stacked device in which a plurality of chips are integrally sealed, the boundary scan test only needs to be carried out once with a smaller number of pins.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: April 25, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kumi Miyachi, Toshifumi Yamashita