Patents by Inventor Toshiharu Ohbu

Toshiharu Ohbu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11088118
    Abstract: According to an embodiment, a semiconductor device includes a first metal plate, a second metal plate, and two or more semiconductor units. The two or more semiconductor units are disposed on the first metal plate. The each of the two or more semiconductor units includes a first metal member, a second metal member, and a semiconductor element. The first metal member has a first connection surface connected to the first major surface. The second metal member has a second connection surface connected to the second major surface. The semiconductor element includes an active region having surfaces respectively opposing the first connection surface and the second connection surface. A surface area of the first connection surface is greater than a surface area of the surface of the active region opposing the first connection surface. A surface area of the second connection surface is greater than a surface area of the surface of the active region opposing the second connection surface.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: August 10, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kazuyasu Takimoto, Yuta Ichikura, Toshiharu Ohbu, Hiroaki Ito, Naotake Watanabe, Nobumitsu Tada, Naoki Yamanari, Daisuke Hiratsuka, Hiroki Sekiya, Yuuji Hisazato, Naotaka Iio, Hitoshi Matsumura
  • Publication number: 20200321320
    Abstract: According to an embodiment, a semiconductor device includes a first metal plate, a second metal plate, and two or more semiconductor units. The two or more semiconductor units are disposed on the first metal plate. The each of the two or more semiconductor units includes a first metal member, a second metal member, and a semiconductor element. The first metal member has a first connection surface connected to the first major surface. The second metal member has a second connection surface connected to the second major surface. The semiconductor element includes an active region having surfaces respectively opposing the first connection surface and the second connection surface. A surface area of the first connection surface is greater than a surface area of the surface of the active region opposing the first connection surface. A surface area of the second connection surface is greater than a surface area of the surface of the active region opposing the second connection surface.
    Type: Application
    Filed: November 30, 2017
    Publication date: October 8, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kazuyasu TAKIMOTO, Yuta ICHIKURA, Toshiharu OHBU, Hiroaki ITO, Naotake WATANABE, Nobumitsu TADA, Naoki YAMANARI, Daisuke HIRATSUKA, Hiroki SEKIYA, Yuuji HISAZATO, Naotaka IIO, Hitoshi MATSUMURA
  • Publication number: 20180233464
    Abstract: A semiconductor modules includes insulating substrates having first and second patterns thereon. One terminal plate connects the first patterns and another terminal plate connects the second patterns. A first and a second switching chip are provided on the first pattern. Bonding wires connect the first ans second chips to the second pattern. An insulating plate with an auxillary conductor theron is disposed on the first pattern between the second pattern and both the first and second chips. A first auxiliary connection connect the auxiliary conductor and the second chip and a second auxilliary connection connect thes auxiliary conductor and the second pattern. The auxiliary connections may be, for example, bonding wires or solder connections.
    Type: Application
    Filed: August 28, 2017
    Publication date: August 16, 2018
    Inventors: Nobumitsu TADA, Hiroaki ITO, Kazuya KODANI, Toshiharu OHBU, Hiroki SEKIYA, Yuuji HISAZATO, Hitoshi MATSUMURA
  • Patent number: 9795049
    Abstract: A semiconductor device includes a base plate, a semiconductor chip, and a first to a fourth terminal plates. The first terminal plate includes a first main body unit. The second terminal plate includes a second main body unit. The second main body unit opposes the first main body unit. The third terminal plate includes a third main body unit. The third main body unit opposes the first main body unit and the second main body unit. The fourth terminal plate includes a fourth main body unit. The fourth main body unit opposes the third main body unit. A thickness of the third main body unit is thinner than a thickness of the first main body unit. A thickness of the fourth main body unit is thinner than a thickness of the second main body unit.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: October 17, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobumitsu Tada, Kazuya Kodani, Hiroaki Ito, Toshiharu Ohbu, Hitoshi Matsumura
  • Publication number: 20160190032
    Abstract: According to an embodiment, a wiring board includes an insulating board including a heat transfer region made of silicon nitride and having a thickness in a range between 0.2 mm and 1 mm; and a wiring layer including a pad stacked on the heat transfer region and made of a metal material having a thickness of 1.5 mm or more.
    Type: Application
    Filed: December 11, 2015
    Publication date: June 30, 2016
    Inventors: Kazuya Kodani, Yuta Ichikura, Nobumitsu Tada, Hiroaki Ito, Toshiharu Ohbu, Taihei Koyama, Kazuaki Yuuki, Yosuke Nakazawa, Atsushi Yamamoto, Makoto Otani, Kazuhiro Ueda, Tomohiro Iguchi
  • Publication number: 20160057881
    Abstract: A semiconductor device includes a base plate, a semiconductor chip, and a first to a fourth terminal plates. The first terminal plate includes a first main body unit. The second terminal plate includes a second main body unit. The second main body unit opposes the first main body unit. The third terminal plate includes a third main body unit. The third main body unit opposes the first main body unit and the second main body unit. The fourth terminal plate includes a fourth main body unit. The fourth main body unit opposes the third main body unit. A thickness of the third main body unit is thinner than a thickness of the first main body unit. A thickness of the fourth main body unit is thinner than a thickness of the second main body unit.
    Type: Application
    Filed: February 19, 2015
    Publication date: February 25, 2016
    Inventors: Nobumitsu Tada, Kazuya Kodani, Hiroaki Ito, Toshiharu Ohbu, Hitoshi Matsumura