Patents by Inventor Toshihide Kamata

Toshihide Kamata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9786450
    Abstract: A membrane switch in which a first conductive part is formed on a first substrate, a second conductive part is formed on a second substrate, and the substrates are layered via a spacer such that the conductive parts face each other with a space therebetween, and an organic material showing piezoelectricity is filled, or disposed in the space such that an air gap is present, are useful for obtaining an output signal corresponding to an applied pressure.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: October 10, 2017
    Assignee: AJINOMOTO CO., INC.
    Inventors: Yoshinori Wada, Hiroyasu Koto, Yuichi Watanabe, Sei Uemura, Manabu Kitazawa, Satoru Ohashi, Toshihide Kamata
  • Patent number: 9464167
    Abstract: Ferroelectric memory elements which contain a poly ?-amino acid which is a copolymer containing a glutamic acid-?-ester unit represented by the formula (I), defined herein, and a glutamic acid-?-ester unit represented by the formula (II), defined herein, in a molar ratio of units of formula (I) to units of formula (II) of 10/90-90/10 are useful as recording elements such as RFID and the like.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: October 11, 2016
    Assignee: AJINOMOTO CO., INC.
    Inventors: Satoru Ohashi, Sei Uemura, Manabu Kitazawa, Toshihide Kamata
  • Patent number: 9450174
    Abstract: Poly(?-amino acid) which contain: (A) a glutamic acid ?-ester unit represented by formula (I): and (B) one or more kinds of units selected from a glutamic acid ?-ester unit represented by formula (II), an alanine unit, a phenylalanine unit and an N?-benzyloxycarbonyllysine unit, represented by formula (III), and a glutamic acid ?-ester unit represented by formula (IV) can be dissolved in various solvents and are useful for preparing piezoelectric elements which exhibit superior piezoelectricity.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: September 20, 2016
    Assignee: AJINOMOTO CO., INC.
    Inventors: Satoru Ohashi, Sei Uemura, Manabu Kitazawa, Toshihide Kamata, Yoshinori Wada
  • Publication number: 20150311012
    Abstract: A membrane switch in which a first conductive part is formed on a first substrate, a second conductive part is formed on a second substrate, and the substrates are layered via a spacer such that the conductive parts face each other with a space therebetween, and an organic material showing piezoelectricity is filled, or disposed in the space such that an air gap is present, are useful for obtaining an output signal corresponding to an applied pressure.
    Type: Application
    Filed: May 7, 2015
    Publication date: October 29, 2015
    Applicant: AJINOMOTO CO., INC.
    Inventors: Yoshinori WADA, Hiroyasu Koto, Yuichi Watanabe, Sei Uemura, Manabu Kitazawa, Satoru Ohashi, Toshihide Kamata
  • Patent number: 8927054
    Abstract: Provided are a conductive substrate which can be produced from inexpensive materials at a lower temperature than those for conventional substrates, and a process for producing the conductive substrate. The conductive substrate comprises a substrate (1) and a conductive pattern (5) provided on the substrate (1), wherein the conductive pattern (5), except on a surface and in a vicinity thereof on a side opposite to the substrate side, entirely has a structure comprising a binder (2) and fine aluminum grains (3) dispersed therein, and on the surface and in the vicinity a surface metal aluminum layer (4) is formed in which the fine aluminum grains (3) are spread with a roller to form a conductive junction connecting the fine aluminum grains to each other.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: January 6, 2015
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Manabu Yoshida, Toshihide Kamata
  • Publication number: 20140368083
    Abstract: Poly(?-amino acid) which contain: (A) a glutamic acid ?-ester unit represented by formula (I): and (B) one or more kinds of units selected from a glutamic acid ?-ester unit represented by formula (II), an alanine unit, a phenylalanine unit and an N?-benzyloxycarbonyllysine unit, represented by formula (III), and a glutamic acid ?-ester unit represented by formula (IV) can be dissolved in various solvents and are useful for preparing piezoelectric elements which exhibit superior piezoelectricity.
    Type: Application
    Filed: August 13, 2014
    Publication date: December 18, 2014
    Applicant: AJINOMOTO CO., INC.
    Inventors: Satoru OHASHI, Sei Uemura, Manabu Kitazawa, Toshihide Kamata, Yoshinori Wada
  • Publication number: 20140138654
    Abstract: Ferroelectric memory elements which contain a poly ?-amino acid which is a copolymer containing a glutamic acid-?-ester unit represented by the formula (I), defined herein, and a glutamic acid-?-ester unit represented by the formula (II), defined herein, in a molar ratio of units of formula (I) to units of formula (II) of 10/90-90/10 are useful as recording elements such as RFID and the like.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 22, 2014
    Applicant: Ajinomoto Co., Inc.
    Inventors: Satoru OHASHI, Sei UEMURA, Manabu KITAZAWA, Toshihide KAMATA
  • Patent number: 8673070
    Abstract: Disclosed is a process for producing a silicon oxide or silicon oxynitride thin film having a high level of water vapor and oxygen barrier property and a high strength with a higher efficiency by a solution process which is advantageous in productivity. Also disclosed is a thin film that is obtained by the process and is useful, for example, as a protective film for electric elements such as organic EL elements. A solution containing a smectite group silicate layered compound and a silazane compound is coated onto a surface of a substrate by a liquid phase process to form a film. The thin film thus obtained is exposed to ultraviolet light under an oxygen atmosphere to produce a silicon oxide thin film or a silicon oxynitride compound thin film containing the smectite group silicate layered compound. The smectite group silicate compound is a material represented by the following general formula. A1/3BmSi4O10.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: March 18, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Sei Uemura, Toshihide Kamata
  • Publication number: 20130333738
    Abstract: An object of the invention is to provide a thermoelectric conversion material that can have a balance between flexibility and high thermoelectric conversion capacity, a thermoelectric conversion element using the material, and a device that uses waste heat of, for example, an electronic apparatus and a vehicle by using the element. Provided is a thermoelectric conversion element that includes a layer constituted by an organic material in which a fine particle of a carbon nanotube is dispersed and which has flexibility, preferably, a high glass transition temperature and low thermal conductivity, and in which a mass ratio of the carbon nanotube to the organic material is 50% by mass to 90% by mass, and a device in which the thermoelectric conversion element is installed to a heat release portion of an apparatus.
    Type: Application
    Filed: March 2, 2012
    Publication date: December 19, 2013
    Inventors: Kouji Suemori, Toshihide Kamata
  • Patent number: 8278561
    Abstract: A conductive pattern forming film provides a pattern formed on a film substrate having flexibility by pressurizing, under heating, a conductive paste in which powder or fine particles of metal or semiconductor are dispersed and filled. A conductive pattern forming apparatus comprises a sample installation table having a flat placement surface, and a driving body for pressure application which is placed in a manner facing the placement surface and movable, wherein the driving body for pressure application is equipped with a support which is constituted by a flat metal panel having metal spheres along its bottom face.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: October 2, 2012
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Toshihide Kamata, Manabu Yoshida
  • Publication number: 20120222890
    Abstract: Provided are a conductive substrate which can be produced from inexpensive materials at a lower temperature than those for conventional substrates, and a process for producing the conductive substrate. The conductive substrate comprises a substrate (1) and a conductive pattern (5) provided on the substrate (1), wherein the conductive pattern (5), except on a surface and in a vicinity thereof on a side opposite to the substrate side, entirely has a structure comprising a binder (2) and fine aluminum grains (3) dispersed therein, and on the surface and in the vicinity a surface metal aluminum layer (4) is formed in which the fine aluminum grains (3) are spread with a roller to form a conductive junction connecting the fine aluminum grains to each other.
    Type: Application
    Filed: November 18, 2010
    Publication date: September 6, 2012
    Applicant: National Institute of Avanced Industrial Science and Technology
    Inventors: Manabu Yoshida, Toshihide Kamata
  • Publication number: 20110185948
    Abstract: Disclosed is a process for producing a silicon oxide or silicon oxynitride thin film having a high level of water vapor and oxygen barrier property and a high strength with a higher efficiency by a solution process which is advantageous in productivity. Also disclosed is a thin film that is obtained by the process and is useful, for example, as a protective film for electric elements such as organic EL elements. A solution containing a smectite group silicate layered compound and a silazane compound is coated onto a surface of a substrate by a liquid phase process to form a film. The thin film thus obtained is exposed to ultraviolet light under an oxygen atmosphere to produce a silicon oxide thin film or a silicon oxynitride compound thin film containing the smectite group silicate layered compound. The smectite group silicate compound is a material represented by the following general formula. A1/3BmSi4O10.
    Type: Application
    Filed: August 28, 2009
    Publication date: August 4, 2011
    Inventors: Sei Uemura, Toshihide Kamata
  • Patent number: 7785948
    Abstract: The present invention provides a thin film transistor having excellent formability and processability, and particularly a thin film transistor using plastics as a substrate; an organic semiconductor as an active layer; and SiO2 thin films formed by coating as a sealing layer and a gate insulating layer, and a process for producing the same. The present invention provides a field-effect type thin film transistor having an active layer of an organic semiconductor, comprising on a plastic substrate, a sealing layer of a SiO2 thin film formed by coating; a gate electrode; a gate insulating layer of a SiO2 thin film formed by coating; gate and drain electrodes; and a semiconductor active layer. The high-quality SiO2 thin film is obtained by using a silicon compound as a starting material and irradiating a coated thin film of the solution of the starting material with light in an oxygen atmosphere.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: August 31, 2010
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Toshihide Kamata, Takehito Kozasa
  • Publication number: 20100140756
    Abstract: An object of the present invention is to provide a semiconductor thin film device which employs a silicon oxide thin film having an equivalent level of high insulating performance to those currently used in electronic devices, through a low-temperature printing process on a plastic substrate having plasticity or other types of substrates at a temperature equal to or lower than the heat resistant temperature of the substrate, and to provide a method for forming the device. The semiconductor thin film device is formed as follows: a coating film of a silicon compound including a silazane structure or a siloxane structure is formed on a plastic substrate having plasticity; the coating film is converted into a silicon oxide thin film; and the thin film is utilized as part of an insulating layer or a sealing layer.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 10, 2010
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Kozasa, Toshihide Kamata
  • Publication number: 20100025088
    Abstract: The present invention forms a conductive pattern using a simple process on a general plastic substrate having flexibility, and also provides a conductive pattern forming film that allows for easy formation of a conductive pattern using an apparatus that performs a simple process of oriented pressurization at low temperature, as well as a method for forming conductive pattern and a conductive pattern forming apparatus for the same. The conductive pattern forming film provides a pattern formed on a film substrate having flexibility by pressurizing, under heating, a conductive paste in which powder or fine particles of metal or semiconductor are dispersed and filled.
    Type: Application
    Filed: October 17, 2007
    Publication date: February 4, 2010
    Inventors: Toshihide Kamata, Manabu Yoshida
  • Publication number: 20090140235
    Abstract: The present invention provides a thin film transistor having excellent formability and processability, and particularly a thin film transistor using plastics as a substrate; an organic semiconductor as an active layer; and SiO2 thin films formed by coating as a sealing layer and a gate insulating layer, and a process for producing the same. The present invention provides a field-effect type thin film transistor having an active layer of an organic semiconductor, comprising on a plastic substrate, a sealing layer of a SiO2 thin film formed by coating; a gate electrode; a gate insulating layer of a SiO2 thin film formed by coating; gate and drain electrodes; and a semiconductor active layer. The high-quality SiO2 thin film is obtained by using a silicon compound as a starting material and irradiating a coated thin film of the solution of the starting material with light in an oxygen atmosphere.
    Type: Application
    Filed: August 19, 2005
    Publication date: June 4, 2009
    Applicant: National Institute of Advance Industrial Science and Technology
    Inventors: Toshihide Kamata, Takehito Kozasa
  • Patent number: 7138682
    Abstract: A thin-film transistor includes a substrate (10), a gate electrode (20) provided on a portion of the substrate, an insulation layer (30) arranged to cover the gate electrode and the substrate, a source or drain (40) provided on the insulation layer in a region corresponding to a region of the gate electrode, a semiconductor layer (50) arranged to cover the source or drain (40) and the insulation layer, a drain or source (60) provided on the semiconductor in a portion of a region corresponding to a region of the source or drain (40) that overlaps with the gate electrode, and a channel (70) formed between the source or drain (40) and the drain or source (60) and having a length defined by a film thickness of the semiconductor layer (50).
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: November 21, 2006
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Toshihide Kamata, Manabu Yoshida
  • Publication number: 20050121674
    Abstract: A thin-film transistor includes a substrate (10), a gate electrode (20) provided on a portion of the substrate, an insulation layer (30) arranged to cover the gate electrode and the substrate, a source or drain (40) provided on the insulation layer in a region corresponding to a region of the gate electrode, a semiconductor layer (50) arranged to cover the source or drain (40) and the insulation layer, a drain or source (60) provided on the semiconductor in a portion of a region corresponding to a region of the source or drain (40) that overlaps with the gate electrode, and a channel (70) formed between the source or drain (40) and the drain or source (60) and having a length defined by a film thickness of the semiconductor layer (50).
    Type: Application
    Filed: December 27, 2002
    Publication date: June 9, 2005
    Applicant: NAT. INST. OF ADVANCED INDUSTRIAL SCI. AND TECH
    Inventors: Toshihide Kamata, Manabu Yoshida