Patents by Inventor Toshihide Kuriyama
Toshihide Kuriyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7990747Abstract: There are provided a semiconductor device and a semiconductor chip, in which the interconnection is made to be highly reliable by stacking three or more layers of chips without contact therebetween. A semiconductor chip of the present invention comprises a first signal transmission circuit, a silicon substrate on which a first changeover switch is formed, and an interconnection layer on which a first capacitive-coupling upper electrode is formed, wherein a first capacitive-coupling lower electrode is additionally formed on the rear surface of the silicon substrate through a first via hole that penetrates the silicon substrate and, whereas the first capacitive-coupling upper electrode is directly connected to the first signal transmission circuit, the first capacitive-coupling lower electrode is connected to the first signal transmission circuit through the first via hole and through the first changeover switch.Type: GrantFiled: February 29, 2008Date of Patent: August 2, 2011Assignee: NEC CorporationInventors: Eiji Hankui, Toshihide Kuriyama, Hideki Sasaki, Muneo Fukaishi
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Publication number: 20100097159Abstract: There are provided a semiconductor device and a semiconductor chip, in which the interconnection is made to be highly reliable by stacking three or more layers of chips without contact therebetween. A semiconductor chip of the present invention comprises a first signal transmission circuit, a silicon substrate on which a first changeover switch is formed, and an interconnection layer on which a first capacitive-coupling upper electrode is formed, wherein a first capacitive-coupling lower electrode is additionally formed on the rear surface of the silicon substrate through a first via hole that penetrates the silicon substrate and, whereas the first capacitive-coupling upper electrode is directly connected to the first signal transmission circuit, the first capacitive-coupling lower electrode is connected to the first signal transmission circuit through the first via hole and through the first changeover switch.Type: ApplicationFiled: February 29, 2008Publication date: April 22, 2010Inventors: Eiji Hankui, Toshihide Kuriyama, Hideki Sasaki, Muneo Fukaishi
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Patent number: 7430125Abstract: A second ground plane (18); has one end opposite to a connector (14), which end is connected to a first ground plane (17) by resistor connection element (41). Accordingly, it is possible to lower Q of resonance of the ground structure by the resistor connection element (41) and to prevent generation of an intense electromagnetic field attributed to an electromagnetic field of a data processing circuit. Especially when the resistor connection element (41) has a resistance value identical to a characteristic impedance of the ground structure, the ground structure is terminated in a matched way and it is possible to assure prevention of generation of an electromagnetic field attributed to resonance.Type: GrantFiled: July 16, 2007Date of Patent: September 30, 2008Assignee: NEC CorporationInventors: Hideki Sasaki, Toshihide Kuriyama
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Publication number: 20070258222Abstract: A second ground plane (18); has one end opposite to a connector (14), which end is connected to a first ground plane (17) by resistor connection element (41). Accordingly, it is possible to lower Q of resonance of the ground structure by the resistor connection element (41) and to prevent generation of an intense electromagnetic field attributed to an electromagnetic field of a data processing circuit. Especially when the resistor connection element (41) has a resistance value identical to a characteristic impedance of the ground structure, the ground structure is terminated in a matched way and it is possible to assure prevention of generation of an electromagnetic field attributed to resonance.Type: ApplicationFiled: July 16, 2007Publication date: November 8, 2007Applicant: NEC CORPORATIONInventors: Hideki SASAKI, Toshihide Kuriyama
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Patent number: 7268739Abstract: A second ground plane (18); has one end opposite to a connector (14), which end is connected to a first ground plane (17) by resistor connection element (41). Accordingly, it is possible to lower Q of resonance of the ground structure by the resistor connection element (41) and to prevent generation of an intense electromagnetic field attributed to an electromagnetic field of a data processing circuit. Especially when the resistor connection element (41) has a resistance value identical to a characteristic impedance of the ground structure, the ground structure is terminated in a matched way and it is possible to assure prevention of generation of an electromagnetic field attributed to resonance.Type: GrantFiled: March 11, 2002Date of Patent: September 11, 2007Assignee: NEC CorporationInventors: Hideki Sasaki, Toshihide Kuriyama
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Patent number: 7164898Abstract: A current restriction structure for restricting a higher-harmonic-wave current generated in a digital circuit block from entering a radio circuit block and/or a radio-frequency current generated in the radio circuit block from entering the digital circuit block is disposed between the radio circuit block and the digital circuit block. The current restriction structure is formed by one or two of equivalent rectangular cylindrical metallic tube including metallic planes overlying/underlying the ground layer and a narrow-pitch via-hole array, which are disposed to enclose the subject current to be restricted and have a short-circuited distal end. The distance between the open plane of the equivalent rectangular cylindrical metallic tube and the short-circuiting plate is set at ¼ of the wavelength of the subject current to be restricted.Type: GrantFiled: April 10, 2002Date of Patent: January 16, 2007Assignee: NEC CorporationInventors: Eiji Hankui, Toshihide Kuriyama
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Patent number: 7031744Abstract: A compact cellular phone with a foldable configuration and two planar antennas having outward directivities are provided inside the compact cellular phone in the foldable configuration. An interval between the two planar antennas provided to a pair of housings is equal to or wider than a width of a human palm in a state in which the compact cellular phone is open. The two planar antennas are planar inverse F-type antennas or patch antennas and impedance around each of the two planar antennas is measured. Then, one of the two planar antennas, which has a preferred transmission characteristic, is selected and used.Type: GrantFiled: December 3, 2001Date of Patent: April 18, 2006Assignee: NEC CorporationInventors: Toshihide Kuriyama, Eiji Hankui
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Patent number: 7002529Abstract: Second ground plane (18), substantially rectangular in shape, is connected to first ground plane (17) mounted with a data processing circuit, and radio communication circuit (12) makes radio communications at communication wavelength ?. A portion of second ground plane (18) from ground connecting means (14) to ground connecting means (33) along continuous edges of second ground plane (18) acts as an antenna. However, since the longest distance a between a plurality of ground connecting means (14, 33) along the continuous edges of second ground plane (18) satisfies “a<?/2?” (where ? is a coefficient equal to or larger than “1”), its resonant frequency is sufficiently higher than the communication frequency of the radio communication circuit.Type: GrantFiled: March 11, 2002Date of Patent: February 21, 2006Assignee: NEC CorporationInventors: Hideki Sasaki, Masaharu Imazato, Yuji Muramatsu, Toshio Kaku, Hidenori Muramatsu, Toshihide Kuriyama, Takashi Yoshinaga
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Patent number: 6882542Abstract: An electronic apparatus comprises a function module having a multilayer wiring unit including a first signal wiring corresponding to an internal layer wiring, a first signal via, a first reference potential wiring, a first signal pad to which the first signal wiring is connected through the first signal via, a first reference potential pad that surrounds the periphery of the first signal pad and to which the first reference potential wiring is connected, and a first reference potential connected to the first reference potential pad; a inultilayer circuit board; a first conductor; and a second conductor.Type: GrantFiled: September 17, 2003Date of Patent: April 19, 2005Assignee: NEC CorporationInventors: Naoya Tamaki, Norio Masuda, Toshihide Kuriyama, Masamoto Tago
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Publication number: 20050017918Abstract: A second ground plane (18); has one end opposite to a connector (14), which end is connected to a first ground plane (17) by resistor connection means (41). Accordingly, it is possible to lower Q of resonance of the aforementioned ground structure by the resistor connection means (41) and to prevent generation of an intense electromagnetic field attributed to an electromagnetic field of a data processing circuit. Especially when the resistor connection means (41) has a resistance value identical to a characteristic impedance of the ground structure, the ground structure is terminated in a matched way and it is possible to assure prevention of generation of an electromagnetic field attributed to resonance.Type: ApplicationFiled: March 11, 2002Publication date: January 27, 2005Inventors: Hideki Sasaki, Toshihide Kuriyama
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Patent number: 6774641Abstract: In a printed circuit board design support apparatus for supporting design of a printed circuit board by calculating a radiation amount of electromagnetic radiation caused by an interconnection on the basis of design information related to each of the printed circuit board having a ground plane, interconnections formed on the printed circuit board, and components to be mounted on the printed circuit board, an arithmetic unit calculates a common mode (CM) radiation amount of the interconnection on the basis of a CM radiation amount ratio that indicates a ratio of a common mode (CM) radiation amount of electromagnetic radiation caused by the ground plane in correspondence with the interconnection to a differential mode (DM) radiation amount of electromagnetic radiation caused by the interconnection. A printed circuit board design support method and program are also disclosed.Type: GrantFiled: June 18, 2002Date of Patent: August 10, 2004Assignee: NEC CorporationInventors: Hideki Sasaki, Takahiro Yaguchi, Akira Wakui, Seishi Eya, Takashi Harada, Toshihide Kuriyama
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Publication number: 20040127249Abstract: A current restriction structure for restricting a higher-harmonic-wave current generated in a digital circuit block from entering a radio circuit block and/or a radio-frequency current generated in the radio circuit block from entering the digital circuit block is disposed between the radio circuit block and the digital circuit block. The current restriction structure is formed by one or two of equivalent rectangular cylindrical metallic tube including metallic planes overlying/underlying the ground layer and a narrow-pitch via-hole array, which are disposed to enclose the subject current to be restricted and have a short-circuited distal end. The distance between the open plane of the equivalent rectangular cylindrical metallic tube and the short-circuiting plate is set at ¼ of the wavelength of the subject current to be restricted.Type: ApplicationFiled: October 10, 2003Publication date: July 1, 2004Inventors: Eiji Hankui, Toshihide Kuriyama
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Publication number: 20040125039Abstract: Second ground plane (18), substantially rectangular in shape, is connected to first ground plane (17) mounted with a data processing circuit, and radio communication circuit (12) makes radio communications at communication wavelength &lgr;. A portion of second ground plane (18) from ground connecting means (14) to ground connecting means (33) along continuous edges of second ground plane (18) acts as an antenna. However, since the longest distance a between a plurality of ground connecting means (14, 33) along the continuous edges of second ground plane (18) satisfies “a<&lgr;/2&agr;” (where &agr; is a coefficient equal to or larger than “1”), its resonant frequency is sufficiently higher than the communication frequency of the radio communication circuit.Type: ApplicationFiled: October 9, 2003Publication date: July 1, 2004Inventors: Hideki Sasaki, Masaharu Imazato, Yuji Muramatsu, Toshio Kaku, Hidenori Muramatsu, Toshihide Kuriyama, Takashi Yoshinaga
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Patent number: 6754876Abstract: A design support system utilizes an information processor for supporting a printed board design. The design support system includes a first unit for designing a printed board that includes at least a ground layer. The design support system also includes a second unit for finding at least one resonant frequency for the ground layer based on information of a resonance-significant size of the ground layer. This information can be used to suppress electromagnetic interference from a printed board.Type: GrantFiled: July 12, 2001Date of Patent: June 22, 2004Assignee: NEC CorporationInventors: Hideki Sasaki, Takashi Harada, Toshihide Kuriyama
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Publication number: 20040057220Abstract: An electronic apparatus comprises a function module having a multilayer wiring unit including a first signal wiring corresponding to an internal layer wiring, a first signal via, a first reference potential wiring, a first signal pad to which the first signal wiring is connected through the first signal via, a first reference potential pad that surrounds the periphery of the first signal pad and to which the first reference potential wiring is connected, and a first reference potential via connected to the first reference potential pad; a multilayer circuit board including a second signal wiring corresponding to an internal layer wiring, a second signal via, a second reference potential wiring, a second signal pad to which one end of the second signal wiring is connected through the second signal via, a second reference potential pad that surrounds the periphery of the second signal pad and to which one end of the second reference potential wiring is connected, a second reference potential via connected to thType: ApplicationFiled: September 17, 2003Publication date: March 25, 2004Applicant: NEC CORPORATIONInventors: Naoya Tamaki, Norio Masuda, Toshihide Kuriyama, Masamoto Tago
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Publication number: 20030224837Abstract: In a portable telephone having a rechargeable battery, an electrically conductive outer cover of the rechargeable battery is connected at a plurality of locations to a ground layer of a circuit board provided within the portable telephone.Type: ApplicationFiled: May 29, 2003Publication date: December 4, 2003Applicant: NEC CorporationInventors: Toshihide Kuriyama, Eiji Hankui, Naoki Kobayashi, Masayoshi Yamashita
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Patent number: 6598208Abstract: A design assisting system is constructed as a CAD (computer-aided design) system for assisting in designing printed-circuit boards or other electronic devices. The system makes it possible to design layouts for reducing an unwanted electromagnetic radiation due to a common-mode current. The system has a first tool for converting at least a set of an electronic device, an interconnection, and a ground plane from layout information of a circuit board into a model for analyzing an electromagnetic field, a second tool for specifying a frequency and calculating a magnetic field intensity distribution near the ground plane using the model, and a third tool for superposing the calculated magnetic field intensity distribution and the position of the interconnection, determining whether a position where a magnetic field or a current is strong and the position of the interconnection are close to each other or not, and outputting a determined result.Type: GrantFiled: February 28, 2001Date of Patent: July 22, 2003Assignee: NEC CorporationInventors: Hideki Sasaki, Takashi Harada, Toshihide Kuriyama
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Patent number: 6545650Abstract: There is provided an apparatus for three-dimensionally displaying an object, including (a) image-displaying devices which display images at an observer's eyes, (b) a beam scanner, (c) an area-identifier which detects a direction on which an observer turns at least one eye to thereby identify a display area at which the observer gazes, (d) a calculator which calculates, based on an image signal including parallax, a three-dimensional positional relation between the observer and an object to be observed, existing in the display area, (e) an image-position controller which controls positions of images so that the object is displayed in the display area at locations on lines connecting the object located at a three-dimensional position calculated by the calculator to centers of pupils of the observer, and (f) a convergence generator which generates a difference between first timing at which the beam scanner is driven and second timing at which images start being displayed in the image-displaying devices, inType: GrantFiled: June 23, 1999Date of Patent: April 8, 2003Assignee: NEC CorporationInventors: Keizo Yamada, Toshihide Kuriyama
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Publication number: 20030046651Abstract: In a printed circuit board design support apparatus for supporting design of a printed circuit board by calculating a radiation amount of electromagnetic radiation caused by an interconnection on the basis of design information related to each of the printed circuit board having a ground plane, interconnections formed on the printed circuit board, and components to be mounted on the printed circuit board, an arithmetic unit calculates a common mode (CM) radiation amount of the interconnection on the basis of a CM radiation amount ratio that indicates a ratio of a common mode (CM) radiation amount of electromagnetic radiation caused by the ground plane in correspondence with the interconnection to a differential mode (DM) radiation amount of electromagnetic radiation caused by the interconnection. A printed circuit board design support method and program are also disclosed.Type: ApplicationFiled: June 18, 2002Publication date: March 6, 2003Applicant: NEC CORPORATIONInventors: Hideki Sasaki, Takahiro Yaguchi, Akira Wakui, Seishi Eya, Takashi Harada, Toshihide Kuriyama
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Patent number: 6429832Abstract: A plasma display panel (PDP) has a plurality of scanning electrodes and a plurality of common electrodes extending in a row direction, a plurality of data electrodes extending in a column direction, and a ground electrode disposed adjacent to the data electrodes for canceling the electromagnetic radiation from the data electrodes during a write period of the PDP.Type: GrantFiled: September 9, 1999Date of Patent: August 6, 2002Assignee: NEC CorporationInventors: Takashi Harada, Toshihide Kuriyama, Yoshizumi Sekii