Patents by Inventor Toshihide Ujihara

Toshihide Ujihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5051806
    Abstract: A gate turn-off (GTO) thyristor has a plurality of unit GTO thyristors of strip-like configuration in a same semiconductor substrate, each unit GTO thyristor being constructed of an N emitter layer, P base layer, N base layer and P emitter layer. The P base and N base layers are shared in common for all the unit GTO thyristors which are formed in a multi-ring configuration. The exposed area of the P emitter layer of a unit GTO thyristor located far from the gate signal input area is made smaller than that of the P emitter layer of a unit GTO thyristor located relatively close to the gate signal input area.
    Type: Grant
    Filed: July 27, 1989
    Date of Patent: September 24, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Toshihide Ujihara, Shuroku Sakurada, Tadashi Sakaue, Shuji Musha
  • Patent number: 4868625
    Abstract: A gate turn-off (GTO) thyristor has a plurality of unit GTO thyristors of strip-like configuration in a same semiconductor substrate, each unit GTO thyristor being constructed of an N emitter layer, P base layer, N base layer and P emitter layer. The P base and N base layers are shared in common for all the unit GTO thyristors which are formed in a multi-ring configuration. The exposed area of the P emitter layer of a unit GTO thyristor located far from the gate signal input area is made smaller than that of the P emitter layer of a unit GTO thyristor located relatively closer to the gate signal input area.
    Type: Grant
    Filed: July 8, 1987
    Date of Patent: September 19, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Toshihide Ujihara, Shuroku Sakurada, Tadashi Sakaue, Shuji Musha