Patents by Inventor Toshihiko Ibuka

Toshihiko Ibuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5284798
    Abstract: On the surface of n-type layer of Ga.sub.1-x Al.sub.x As (0.ltoreq..times..ltoreq.1) having n-type layer, Au layer is formed as a first layer, and alloying treatment is performed after Ge layer, Ni layer and Au layer are sequentially formed. The first Au layer, the second Ge layer, the third Ni layer and the fourth Au layer have the following thickness:______________________________________ 1st layer Au 10-100 .ANG. 2nd layer Ge 50-200 .ANG. 3rd layer Ni 50-200 .ANG. 4th layer Au 200-1000 .ANG. ______________________________________Thus, it is possible to form an ohmic electrode, which has low contact resistance and does not develop ball-up phenomenon.
    Type: Grant
    Filed: October 26, 1992
    Date of Patent: February 8, 1994
    Assignees: Mitsubishi Kasei Polytec Co., Mitsubishi Kasei Corporation
    Inventors: Toshihiko Ibuka, Masahiro Noguchi
  • Patent number: 5192994
    Abstract: On the surface of n-type layer of Ga.sub.1-x Al.sub.x As (0.ltoreq.x.ltoreq.1) having n-type layer, Au layer is formed as a first layer, and alloying treatment is performed after Ge layer, Ni layer and Au layer are sequentially formed. The first Au layer, the second Ge layer, the third Ni layer and the fourth Au layer have the following thickness:______________________________________ 1st layer Au 10-100 .ANG. 2nd layer Ge 50-200 .ANG. 3rd layer Ni 50-200 .ANG. 4th layer Au 200-1000 .ANG. ______________________________________Thus, it is possible to form an ohmic electrode, which has low contact resistance and does not develop ball-up phenomenon.
    Type: Grant
    Filed: August 28, 1990
    Date of Patent: March 9, 1993
    Assignees: Mitsubishi Kasei Polytec Co., Mitsubishi Kasei Corporation
    Inventors: Toshihiko Ibuka, Masahiro Noguchi
  • Patent number: 5051376
    Abstract: A method for producing a semiconductor device comprises the steps of: preparing a III.sub.b -V.sub.b group compound single crystalline semiconductor substrate produced by a liquid encapsulated Czochralski process, the single crystalline semiconductor substrate having a carbon concentration of 1.times.10.sup.15 cm.sup.-3 or less, implanting conductive impurity ions into the single crystalline semiconductor substrate and then annealing, and a semiconductor device produced by this method.
    Type: Grant
    Filed: January 11, 1990
    Date of Patent: September 24, 1991
    Assignees: Mitsubishi Monsanto Chemical Co, Ltd., Mitsubishi Chemical Industries, Ltd.
    Inventors: Yutaka Yamada, Toshihiko Ibuka, Fumio Orito, Yuichi Seta, Shin-ichiro Kawabata
  • Patent number: 5040044
    Abstract: According to the present invention, roughness are formed on the surface of III-V group compound semiconductor to prevent total reflection, and SiNx film is formed on rough surface. This makes it possible to increase external quantum efficiency by surface roughness. Further, bond strength is increased because SiNx film is furnished on the roughness. As the result, the detachment of SiNx film is prevented, moisture resistant property is improved, and service life of LED is extended by preventing oxidation.
    Type: Grant
    Filed: June 20, 1990
    Date of Patent: August 13, 1991
    Assignees: Mitsubishi Monsanto Chemical Company, Mitsubishi Kasei Corporation
    Inventors: Masahiro Noguchi, Toshihiko Ibuka