Patents by Inventor Toshihiko Ichise

Toshihiko Ichise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5665630
    Abstract: A semiconductor device has a device region, and a device separation region formed on a semiconductor substrate doped with impurities. And, the device separation region has a metal wiring formed on the surface of the device region or the back surface of the substrate. An aluminum region extending in the longitudinal direction connected to the metal wiring is formed within the device separation region.
    Type: Grant
    Filed: November 16, 1994
    Date of Patent: September 9, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keiji Ishizuka, Yuzo Kataoka, Toshihiko Ichise, Hidekazu Takahashi, Hayao Ohzu
  • Patent number: 5614439
    Abstract: A semiconductor device with a high-density wiring structure, and a producing method for such device are provided. The semiconductor device has a substrate such as silicon, an insulation layer laminated on the substrate and having a groove or a hole, and a wiring of a conductive material formed in the groove or hole in the insulation layer. The wiring is formed by depositing a conductive material such as aluminum or an aluminum alloy in the groove or hole of the insulation layer by a CVD method utilizing alkylaluminum hydride gas and hydrogen. The groove or hole can be formed by an ordinary patterning method combined with etching.
    Type: Grant
    Filed: February 21, 1995
    Date of Patent: March 25, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Fumio Murooka, Tetsuo Asaba, Shigeyuki Matsumoto, Osamu Ikeda, Toshihiko Ichise, Yukihiko Sakashita, Shunsuke Inoue
  • Patent number: 5517224
    Abstract: A semiconductor device has transistors, each transistor having a first conduction type of a first semiconductor region including a first main electrode region, a second conduction type of second semiconductor region including a channel region which is provided in the first semiconductor region, a second main electrode region provided in the second semiconductor region, a gate electrode on the channel region extending through a gate insulating film between the first and second main electrode regions. A portion of the first main electrode region which contacts the channel region is a high-resistance region. The semiconductor device also has buried-type element isolation regions which prevent the occurrence of latch up and bird's beaks in the device.
    Type: Grant
    Filed: June 17, 1993
    Date of Patent: May 14, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shunichi Kaizu, Hiroyuki Nakamura, Toshihiko Ichise, Kei Fujita, Seiji Kamei
  • Patent number: 5514989
    Abstract: A driver circuit comprises a current mirror circuit including an output transistor, a load connected to a main electrode of the output transistor, and current supplying device for supplying a current to a control electrode of the output transistor. The output transistor controls a current flowing through the load.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: May 7, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiaki Sato, Toshihiko Ichise, Keiji Ishizuka, Shunichi Morita, Shunichi Kaizu
  • Patent number: 5364802
    Abstract: A semiconductor device including a bipolar transistor, has a collector region including a first semiconductor region of the first conductivity type and a second semiconductor region of the first conductivity type having higher resistance than the first semiconductor region, a base region including a semiconductor region of the second conductivity type, and an emitter region including a semiconductor region of the first conductivity type. The semiconductor device further comprises a metal layer region for connecting the first semiconductor region and the collector electrode on the collector region provided within the second semiconductor region layer of the collector region.
    Type: Grant
    Filed: October 1, 1993
    Date of Patent: November 15, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuzo Kataoka, Toshihiko Ichise, Keiji Ishizuka, Tetsuo Asaba
  • Patent number: 5306934
    Abstract: A semiconductor device including a bipolar transistor, has a collector region including a first semiconductor region of the first conductivity type and a second semiconductor region of the first conductivity type having higher resistance than the first semiconductor region, a base region including a semiconductor region of the second conductivity type, and an emitter region including a semiconductor region of the first conductivity type. The semiconductor device further comprises a metal layer region for connecting the first semiconductor region and the collector electrode on the collector region provided within the second semiconductor region layer of the collector region.
    Type: Grant
    Filed: January 17, 1992
    Date of Patent: April 26, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuzo Kataoka, Toshihiko Ichise, Keiji Ishizuka, Tetsuo Asaba
  • Patent number: 5216447
    Abstract: An ink jet recording apparatus having a recording head wherein an electrothermal converting element for generating the emission energy and a semiconductor functional element are integrally formed within a semiconductor substrate. The functional element with its base and collector shorted is electrically connected to the electrothermal converting element. Thereby, variation in ink emission is limited so that the recording head can record high quality images.
    Type: Grant
    Filed: January 12, 1990
    Date of Patent: June 1, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kei Fujita, Hiroshi Nakano, Toshihiko Ichise
  • Patent number: 5200639
    Abstract: A semiconductor device has a device region, and a device separation region formed on a semiconductor substrate doped with impurities. And, the device separation region has a metal wiring formed on the surface of the device region or the back surface of the substrate. An aluminum region extending in the longitudinal direction connected to the metal wiring is formed within the device separation region.
    Type: Grant
    Filed: May 29, 1991
    Date of Patent: April 6, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keiji Ishizuka, Yuzo Kataoka, Toshihiko Ichise, Hidekazu Takahashi, Hayao Ohzu
  • Patent number: 4717891
    Abstract: A phase locked loop circuit including a controllable oscillator, a phase detector for detecting a phase difference between an output signal of the oscillator and an input signal, and a control signal generator for generating a control signal for controlling an oscillation frequency of the oscillator on the basis of the output of the phase detector. The phase locked loop circuit also includes a feedback circuit for controlling a level of the control signal on the basis of a DC level thereof. The feedback circuit is able to temperature compensate for changes in the oscillator output signal thereby keeping the lock range of the phase locked loop circuit constant against variations in temperature.
    Type: Grant
    Filed: June 20, 1986
    Date of Patent: January 5, 1988
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshihiko Ichise, Tsuguhide Sakata, Hisashi Kawai