Patents by Inventor Toshihiko Kai

Toshihiko Kai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113515
    Abstract: A fault current is removed at a higher speed. A high-speed introduction device includes: a connection chamber provided in an insulative container; a first electrode and a second electrode disposed to be electrically separated from each other in the connection chamber at least before an introduction operation, each of the first electrode and the second electrode being composed of a conductive material; and an injector to inject at least one of a charged particle and a conductive particle, the injector communicating with the connection chamber, wherein when the introduction operation is started, the injector injects at least one of the charged particle and the conductive particle into the connection chamber.
    Type: Application
    Filed: April 5, 2022
    Publication date: April 4, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Toshihiko TAKEMATSU, Takayuki KAI
  • Patent number: 6484249
    Abstract: An apparatus and method for efficiently transferring a plurality of segmented data with various sizes. An address translation storage unit stores an address translation table which provides a plurality of translation descriptor domains to support a plurality of translation step sizes. Depending on the segment size of each data block to be transferred, a translation descriptor domain selection unit chooses a suitable translation descriptor domain within the address translation table. Data segment mapping is then performed with translation descriptors in the selected translation descriptor domain.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: November 19, 2002
    Assignee: Fujitsu Limited
    Inventors: Koichi Hirai, Toshihiko Kai
  • Publication number: 20010025336
    Abstract: An apparatus and method for efficiently transferring a plurality of segmented data with various sizes. An address translation storage unit stores an address translation table which provides a plurality of translation descriptor domains to support a plurality of translation step sizes. Depending on the segment size of each data block to be transferred, a translation descriptor domain selection unit chooses a suitable translation descriptor domain within the address translation table. Data segment mapping is then performed with translation descriptors in the selected translation descriptor domain.
    Type: Application
    Filed: December 7, 2000
    Publication date: September 27, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Koichi Hirai, Toshihiko Kai
  • Patent number: 5377342
    Abstract: A processor module generates a data write request and sends data specified thereby to each of two data buffers respectively provided in two data storage units, each having a data storage device, such as a magnetic disc device. When the data has been completely written into each of the data buffers, a write completion response is sent back to the processor module from each of the data storage units. When the processor module has received the write completion responses from the data storage units, it recognizes that the data write request has been completed.
    Type: Grant
    Filed: June 14, 1991
    Date of Patent: December 27, 1994
    Assignee: Fujitsu, Ltd.
    Inventors: Masanori Sakai, Toshihiko Kai, Osamu Akiba