Patents by Inventor Toshihiko Murata

Toshihiko Murata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230318856
    Abstract: In interpreting a data record in a blockchain of a certain cryptographic asset, it is usually necessary to use the API of the node software provided by the developer of the software that devises the implementation method. However, since an input/output method of the API also differs depending on the implementation method, it is difficult to collect and analyze blockchain data of cryptographic assets according to a plurality of different implementation methods. The present invention provides a cryptographic asset blockchain processing apparatus or the like that collects blockchain data generated by a plurality of different implementation methods, converts the data into data that can be analyzed, and processes a transaction content such as a quantity, a unit price, and a partner of a transaction cryptographic asset into a standardized format, thereby improving convenience of analysis of a large amount of data for an accounting audit or the like.
    Type: Application
    Filed: August 25, 2021
    Publication date: October 5, 2023
    Applicant: KPMG AZSA LLC
    Inventors: Yoshinori SEKI, Junya KONDO, Takeshi SUGIHARA, Chiaki KAMIJO, Toshiyuki ABE, Toshihiko MURATA, Masatake TOYOTA, Jitendra Kumar GAMBHIR, Goutham THANGARAJ, Astha Hareshbhai JADA, Noorah KAZI, Shingo TODA, Tarun N/A
  • Patent number: 7425878
    Abstract: A multimode type SAW filter includes a piezoelectric substrate, and IDT groups formed on the piezoelectric substrate, the IDT groups each having multiple IDTs connected in series in which an input/output electrode and a ground electrode are coupled via a floating conductor. Adjacent electrode fingers between adjacent IDTs among the multiple IDTs of the IDT groups include a first electrode finger connected to the floating conductor in one of the IDT groups and a second electrode finger connected to one of the input/output electrode and the ground electrode in another one of the IDT groups.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: September 16, 2008
    Assignees: Fujitsu Media Devices Limited, Fujitsu Limited
    Inventors: Shogo Inoue, Toshio Nishizawa, Toshihiko Murata
  • Patent number: 7315455
    Abstract: More compact, thinner, shorter and lighter surface-mounted electronic component modules and their manufacturing methods at low costs, thus making them industrially highly valuable are available. Such the component includes a wiring substrate having wiring patterns formed on one side and external connection terminals formed on the other side, the wiring patterns and the external connection terminals being connected with each other by via holes or through holes; a plurality of electronic component devices mounted on the one side of the wiring substrate; and an exterior resin layer formed on the wiring substrate which covers the plurality of electronic component devices, wherein at least one of the plurality of electronic component devices is fastened face up to the one side of the wiring substrate, the connection terminal of the electronic component device fastened face up and the wiring pattern or the connection terminal of another electronic component device being connected with each other by wire.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: January 1, 2008
    Assignee: Fujitsu Media Devices Ltd.
    Inventors: Osamu Furukawa, Toshihiko Murata, Osamu Ikata
  • Patent number: 7212086
    Abstract: A surface acoustic wave device having a given impedance includes multimode type filters connected in series. A composite impedance of the multimode type filters defines the given impedance of the surface acoustic wave device.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: May 1, 2007
    Assignee: Fujitsu Media Devices Limited
    Inventors: Toshio Nishizawa, Toshihiko Murata, Seiichi Mitobe
  • Publication number: 20060244550
    Abstract: A multimode type SAW filter includes a piezoelectric substrate, and IDT groups formed on the piezoelectric substrate, the IDT groups each having multiple IDTs connected in series in which an input/output electrode and a ground electrode are coupled via a floating conductor. Adjacent electrode fingers between adjacent IDTs among the multiple IDTs of the IDT groups include a first electrode finger connected to the floating conductor in one of the IDT groups and a second electrode finger connected to one of the input/output electrode and the ground electrode in another one of the IDT groups.
    Type: Application
    Filed: April 28, 2006
    Publication date: November 2, 2006
    Inventors: Shogo Inoue, Toshio Nishizawa, Toshihiko Murata
  • Patent number: 7127398
    Abstract: The present invention includes a microphone 1 inputting voice uttered by a user; a voice recognition processing section 3 recognizing the voice inputted by the microphone 1, and converting the recognized voice into an input symbol string; a conversation pattern processing section 5 inputting the input symbol string from the voice recognition processing section 3, and outputting an output symbol string corresponding to the input symbol string based on a conversation pattern described in advance; a voice synthesis processing section 7 converting the output symbol string from the conversation pattern processing section 5 into voice; a speaker 9 outputting and uttering the voice from the voice synthesis processing section 7; and a conversation learning section 41 grasping conversation characteristics of the user based on the input symbol string from the conversation pattern processing section 5, and changing the output symbol string in accordance with the grasped conversation characteristics.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: October 24, 2006
    Assignee: Adin Research, Inc.
    Inventors: Kiichiro Yamagishi, Toshihiko Murata, Takeshi Nakamura, Toshihide Fujimaki
  • Patent number: 7102462
    Abstract: The present invention permits further miniaturization and shortening of a surface acoustic wave device while avoiding the influence of the surface acoustic wave device on the inductance value and performance index (Q value) of the spiral inductor. The chip on which the spiral inductor is formed is flip-chip mounted in a package together with another surface acoustic wave device chip. The package is provided with a hermetically sealed lid. A conductor pattern is formed on a face of the package that opposes the spiral inductor. Further, the overlap between the region of the spiral inductor and the conductor pattern is 7% or less.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: September 5, 2006
    Assignee: Fujitsu Media Devices Limited
    Inventors: Noriaki Taniguchi, Osamu Furukawa, Toshihiko Murata, Osamu Kawachi
  • Publication number: 20060044079
    Abstract: A surface acoustic wave device having a given impedance includes multimode type filters connected in series. A composite impedance of the multimode type filters defines the given impedance of the surface acoustic wave device.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 2, 2006
    Inventors: Toshio Nishizawa, Toshihiko Murata, Seiichi Mitobe
  • Publication number: 20060022767
    Abstract: The present invention permits further miniaturization and shortening of a surface acoustic wave device while avoiding the influence of the surface acoustic wave device on the inductance value and performance index (Q value) of the spiral inductor. The chip on which the spiral inductor is formed is flip-chip mounted in a package together with another surface acoustic wave device chip. The package is provided with a hermetically sealed lid. A conductor pattern is formed on a face of the package that opposes the spiral inductor. Further, the overlap between the region of the spiral inductor and the conductor pattern is 7% or less.
    Type: Application
    Filed: December 30, 2004
    Publication date: February 2, 2006
    Inventors: Noriaki Taniguchi, Osamu Furukawa, Toshihiko Murata, Osamu Kawachi
  • Publication number: 20050086790
    Abstract: A press-in apparatus for a Z profile sheet pile, having a press-in section for grasping a Z profile sheet pile having clutches at both ends to press in, wherein the press-in section presses two Z profile sheet piles in at a time in a state where the two Z profile sheet piles are joined each other at clutches thereof.
    Type: Application
    Filed: January 5, 2004
    Publication date: April 28, 2005
    Applicant: GIKEN SEISAKUSHO CO., LTD.
    Inventors: Akio Kitamura, Toshihiko Murata, Yasuhiro Tanaka
  • Publication number: 20040042186
    Abstract: More compact, thinner, shorter and lighter surface-mounted electronic component modules and their manufacturing methods at low costs, thus making them industrially highly valuable are available. Such the component includes a wiring substrate having wiring patterns formed on one side and external connection terminals formed on the other side, the wiring patterns and the external connection terminals being connected with each other by via holes or through holes; a plurality of electronic component devices mounted on the one side of the wiring substrate; and an exterior resin layer formed on the wiring substrate which covers the plurality of electronic component devices, wherein at least one of the plurality of electronic component devices is fastened face up to the one side of the wiring substrate, the connection terminal of the electronic component device fastened face up and the wiring pattern or the connection terminal of another electronic component device being connected with each other by wire.
    Type: Application
    Filed: July 9, 2003
    Publication date: March 4, 2004
    Applicant: FUJITSU MEDIA DEVICES LIMITED
    Inventors: Osamu Furukawa, Toshihiko Murata, Osamu Ikata
  • Patent number: 5929677
    Abstract: A phase locked loop having a charging pump circuit portion for generating a phase difference output voltage between an input signal and an oscillation output signal, and a semiconductor device including such a phase locked loop, are constituted so that the phase difference output signal from the charging pump circuit portion is inputted to a voltage controlled oscillator through a low-pass filter, and an oscillation frequency of the oscillation output signal from the voltage controlled oscillator is brought into conformity with a frequency of the input signal, and they further include voltage source means which is connected to a phase difference output terminal of the charging pump circuit portion during each period in which the phase difference output terminal of the charging pump circuit portion is in a non-conductive state, and supplies a voltage having a potential substantially equal to the potential of the low-pass filter on the output side thereof.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: July 27, 1999
    Assignee: Fujitsu Limited
    Inventor: Toshihiko Murata
  • Patent number: 5757216
    Abstract: In a phase synchronous circuit, a phase of a reference signal and a phase of a compared signal that corresponds to an oscillation signal output by an oscillator are compared with each other a phase comparison output signal which corresponds to a phase difference is fed to the oscillator via a filter so that the oscillator is controlled. A control circuit provided in the phase synchronous circuit causes an output value of the phase comparison output signal to vary nonlinearly in accordance with the phase difference.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: May 26, 1998
    Assignee: Fujitsu Limited
    Inventor: Toshihiko Murata