Patents by Inventor Toshihiko Nagai
Toshihiko Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9927399Abstract: A method for analyzing a protein and a peptide, includes: providing a capillary for isoelectric focusing; providing a capillary device for separation and analysis having the capillary and a solid-phase extraction column being unified as a single tube-like structure; providing an electrophoresis instrument having the capillary device and the mechanism regulating the pressure difference at both ends of the capillary device; introducing a sample containing a target protein or peptide into the solid-phase extraction column to let the target protein or peptide be adsorbed on the column, and filling the capillary device with a carrier ampholyte solution; starting separation by isoelectric focusing after eluting the target protein or peptide by filling the solid-phase extraction column with electrode solution or acid or base solution, or after firstly eluting the target protein or peptide with an eluting solution containing carrier ampholyte and secondly filling the solid-phase extraction column with electrode solutType: GrantFiled: October 14, 2014Date of Patent: March 27, 2018Assignees: NICHIEI INDUSTRY CO., LTD.Inventors: Kiyohito Shimura, Toshihiko Nagai, Shuuichi Fukuhara, Yoshi-ichi Seto
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Publication number: 20160245778Abstract: A method for analyzing a protein and a peptide, includes: providing a capillary for isoelectric focusing; providing a capillary device for separation and analysis having the capillary and a solid-phase extraction column being unified as a single tube-like structure; providing an electrophoresis instrument having the capillary device and the mechanism regulating the pressure difference at both ends of the capillary device; introducing a sample containing a target protein or peptide into the solid-phase extraction column to let the target protein or peptide be adsorbed on the column, and filling the capillary device with a carrier ampholyte solution; starting separation by isoelectric focusing after eluting the target protein or peptide by filling the solid-phase extraction column with electrode solution or acid or base solution, or after firstly eluting the target protein or peptide with an eluting solution containing carrier ampholyte and secondly filling the solid-phase extraction column with electrode solutType: ApplicationFiled: October 14, 2014Publication date: August 25, 2016Inventors: Kiyohito SHIMURA, Toshihiko NAGAI, Shuuichi FUKUHARA, Yoshi-ichi SETO
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Patent number: 7250391Abstract: The cleaning composition for removing resists includes a salt of hydrofluoric acid and a base not containing a metal (A component), a water-soluble organic solvent (B1 component), at least one organic acid or inorganic acid (C component), water (D component), and, optionally, an ammonium salt (E1 component), and having a pH 4-8. Thus, in manufacturing a semiconductor device, such as a copper interconnecting process, efficiency of removing resist residue and other etching residue after etching or ashing is improved, and corrosion resistance of a copper and an insulating film is also improved.Type: GrantFiled: July 11, 2003Date of Patent: July 31, 2007Assignees: Renesas Technology Corp., Matsushita Electric Industrial Co., Ltd., EKC Technology K.K.Inventors: Itaru Kanno, Yasuhiro Asaoka, Masahiko Higashi, Yoshiharu Hidaka, Etsuro Kishio, Tetsuo Aoyama, Tomoko Suzuki, Toshitaka Hiraga, Toshihiko Nagai
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Patent number: 6837963Abstract: A semiconductor device producing method that can clean an edge part of a semiconductor substrate with certainty is provided. The method of producing a semiconductor device includes a step of generating ions and a step of accelerating the ions by means of an electric field and radiating an ion flow onto an edge part of a semiconductor substrate to clean the edge part of the semiconductor substrate. The semiconductor substrate is moved relative to the ion flow while maintaining a state in which the ion flow is being radiated onto the edge part. The step of generating ions includes applying a high-frequency voltage between a pair of electrodes to generate the ions between the electrodes.Type: GrantFiled: October 22, 2001Date of Patent: January 4, 2005Assignees: Renesas Technology Corp., Matsushita Electric Industrial Co., Ltd.Inventors: Hiroshi Tanaka, Naoki Yokoi, Yasuhiro Asaoka, Seiji Muranaka, Toshihiko Nagai
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Publication number: 20040106531Abstract: The cleaning composition for removing resists includes a salt of hydrofluoric acid and a base not containing a metal (A component), a water-soluble organic solvent (B1 component), at least one acid selected from a group consisting of organic acid and inorganic acid (C component), water (D component), and optionally an ammonium salt (E1 component), and its hydrogen ion concentration (pH) is 4-8. Thus, in the manufacturing process of a semiconductor device such as a copper interconnecting process, removing efficiency of resist residue and other etching residue after etching or ashing improves, and corrosion resistance of copper and insulating film also improves.Type: ApplicationFiled: July 11, 2003Publication date: June 3, 2004Applicants: Renesas Technology Corp., Matsushita Electric Industrial Co., Ltd., EKC Technology K.K.Inventors: Itaru Kanno, Yasuhiro Asaoka, Masahiko Higashi, Yoshiharu Hidaka, Etsuro Kishio, Tetsuo Aoyama, Tomoko Suzuki, Toshitaka Hiraga, Toshihiko Nagai
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Publication number: 20040016447Abstract: The present invention provides a cleaning equipment provided with a cleaning solution tank, a cleaning solution supply route for supplying the cleaning solution stored in the cleaning solution tank to a cleaning bath, a cleaning solution return route for returning the cleaning solution that has been supplied to the cleaning bath to the cleaning solution tank, a gas supply route for supplying a purge gas into the cleaning solution tank, and a gas discharge route for discharging the purge gas from the cleaning solution tank. Moreover, a cleaning solution discharge opening of the cleaning solution return route is immersed in the cleaning solution stored in the cleaning solution tank.Type: ApplicationFiled: January 27, 2003Publication date: January 29, 2004Applicants: Matsushita Electrical Industrial Co., Ltd., Mitsubishi Denki Kabushiki KaishaInventors: Toshihiko Nagai, Itaru Kanno, Naoki Yokoi, Yasuhiro Asaoka, Masahiko Higashi
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Publication number: 20030214017Abstract: A gate electrode including a polycrystalline silicon film and a sidewall insulating film are formed on a semiconductor substrate with a gate insulating film therebetween. The semiconductor substrate provided with the gate electrode is brought into contact with a predetermined plating solution to deposit a cobalt film on the semiconductor substrate by electroless plating. Then, a heat treatment is effect to cause a reaction between the silicon in the gate electrode and the cobalt as well as a reaction between the silicon in the semiconductor substrate and the cobalt to form a cobalt silicide film. Thereafter, the unreacted cobalt film is removed. Thereby, damage to the semiconductor substrate can be suppressed, and salicide process can be simplified.Type: ApplicationFiled: October 30, 2002Publication date: November 20, 2003Applicants: Mitsubishi Denki Kabushiki Kaisha, Matsushita Electric Industrial Co., LtdInventors: Naoki Yokoi, Hiroshi Tanaka, Masahiko Higashi, Yasuhiro Asaoka, Toshihiko Nagai
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Patent number: 6645807Abstract: After a metal layer is formed on a dielectric film, the metal layer is subjected to an oxidation process using a liquid having oxidizing power, thereby forming an adhesion layer. Then, an electrode or wiring is formed on the adhesion layer.Type: GrantFiled: September 5, 2002Date of Patent: November 11, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Tsuzumitani, Yasutoshi Okuno, Toshihiko Nagai
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Patent number: 6642142Abstract: In a water rinsing process performed after the surface of a substrate has been cleaned using a cleaning solution, a first spinning process, in which water is supplied to the surface of the substrate while the substrate is rotated at a first rotation speed, and a second spinning process, in which the substrate is rotated at a second rotation speed that is higher than the first rotation speed, are repeatedly performed alternately.Type: GrantFiled: January 3, 2002Date of Patent: November 4, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshihiko Nagai, Hiroshi Tanaka, Naoki Yokoi, Yasuhiro Asaoka, Seiji Muranaka
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Publication number: 20030159716Abstract: A cleaning solution is introduced at a working temperature higher than room temperature into a cleaning chamber after the temperature of the inside of the cleaning chamber has been raised by introducing a fluid having a higher temperature than room temperature into the cleaning chamber, or after the temperature of the cleaning chamber has been raised using a heat source, thereby cleaning a semiconductor wafer set in the cleaning chamber.Type: ApplicationFiled: August 5, 2002Publication date: August 28, 2003Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Toshihiko Nagai, Hiroshi Tanaka, Naoki Yokoi, Yasuhiro Asaoka, Masahiko Higashi
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Publication number: 20030139046Abstract: Disclosed is a method for removing Pt (or Pt—Ir) and BST contaminants on the surface edge, back, and bevel of a semiconductor wafer. A wafer on which a stacked film selected from the group of a Pt film, a Pt—Ir film, and a Ba—Sr—Ti film is formed is prepared. A chemical containing hydrochloric acid is applied only to the surface edge, back, and bevel of the wafer. The surface edge, back, and bevel of the wafer are rinsed with pure water. Further, a chemical containing hydrogen fluoride is applied. The surface edge, back, and bevel of the wafer are rinsed again with pure water.Type: ApplicationFiled: February 27, 2003Publication date: July 24, 2003Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Yasuhiro Asaoka, Hiroshi Tanaka, Naoki Yokoi, Seiji Muranaka, Toshihiko Nagai
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Patent number: 6586145Abstract: A method of fabricating a semiconductor device causing no pattern shifting of a peripheral oxide film etc. in removal of both of an antireflection film and a mask pattern and having a fine structure not implementable solely by photolithography and the semiconductor device are obtained. The method of fabricating a semiconductor device comprises steps of forming a base film of either a silicon film or a silicon compound film on a semiconductor substrate, forming a hard film of either a metal film or a metal compound film on the base film, forming a resist pattern on the hard film, dryly etching the hard film through the resist pattern serving as a mask for forming a hard pattern, dryly etching the base film through the hard pattern serving as a mask and removing the hard pattern by wet etching with a chemical solution not etching at least the base film.Type: GrantFiled: February 13, 2002Date of Patent: July 1, 2003Assignees: Mitsubishi Denki Kabushiki Kaisha, Matsushita Electric Industrial Co., Ltd.Inventors: Naoki Yokoi, Hiroshi Tanaka, Yasuhiro Asaoka, Seiji Muranaka, Toshihiko Nagai
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Patent number: 6531381Abstract: Disclosed is a method for removing Pt (or Pt—Ir) and BST contaminants on the surface edge, back, and bevel of a semiconductor wafer. A wafer on which a stacked film selected from the group of a Pt film, a Pt—Ir film, and a Ba—Sr—Ti film is formed is prepared. A chemical containing hydrochloric acid is applied only to the surface edge, back, and bevel of the wafer. The surface edge, back, and bevel of the wafer are rinsed with pure water. Further, a chemical containing hydrogen fluoride is applied. The surface edge, back, and bevel of the wafer are rinsed again with pure water.Type: GrantFiled: December 3, 2001Date of Patent: March 11, 2003Assignees: Mitsubishi Denki Kabushiki Kaisha, Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Asaoka, Hiroshi Tanaka, Naoki Yokoi, Seiji Muranaka, Toshihiko Nagai
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Publication number: 20030045053Abstract: After a metal layer is formed on a dielectric film, the metal layer is subjected to an oxidation process using a liquid having oxidizing power, thereby forming an adhesion layer. Then, an electrode or wiring is formed on the adhesion layer.Type: ApplicationFiled: September 5, 2002Publication date: March 6, 2003Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Akihiko Tsuzumitani, Yasutoshi Okuno, Toshihiko Nagai
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Publication number: 20030003754Abstract: A method of fabricating a semiconductor device causing no pattern shifting of a peripheral oxide film etc. in removal of both of an antireflection film and a mask pattern and having a fine structure not implementable solely by photolithography and the semiconductor device are obtained. The method of fabricating a semiconductor device comprises steps of forming a base film of either a silicon film or a silicon compound film on a semiconductor substrate, forming a hard film of either a metal film or a metal compound film on the base film, forming a resist pattern on the hard film, dryly etching the hard film through the resist pattern serving as a mask for forming a hard pattern, dryly etching the base film through the hard pattern serving as a mask and removing the hard pattern by wet etching with a chemical solution not etching at least the base film.Type: ApplicationFiled: February 13, 2002Publication date: January 2, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Naoki Yokoi, Hiroshi Tanaka, Yasuhiro Asaoka, Seiji Muranaka, Toshihiko Nagai
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Publication number: 20020197853Abstract: In a water rinsing process performed after the surface of a substrate has been cleaned using a cleaning solution, a first spinning process, in which water is supplied to the surface of the substrate while the substrate is rotated at a first rotation speed, and a second spinning process, in which the substrate is rotated at a second rotation speed that is higher than the first rotation speed, are repeatedly performed alternately.Type: ApplicationFiled: January 3, 2002Publication date: December 26, 2002Inventors: Toshihiko Nagai, Hiroshi Tanaka, Naoki Yokoi, Yasuhiro Asaoka, Seiji Muranaka
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Publication number: 20020177310Abstract: Disclosed is a method for removing Pt (or Pt—Ir) and BST contaminants on the surface edge, back, and bevel of a semiconductor wafer. A wafer on which a stacked film selected from the group of a Pt film, a Pt—Ir film, and a Ba—Sr—Ti film is formed is prepared. A chemical containing hydrochloric acid is applied only to the surface edge, back, and bevel of the wafer. The surface edge, back, and bevel of the wafer are rinsed with pure water. Further, a chemical containing hydrogen fluoride is applied. The surface edge, back, and bevel of the wafer are rinsed again with pure water.Type: ApplicationFiled: December 3, 2001Publication date: November 28, 2002Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Yasuhiro Asaoka, Hiroshi Tanaka, Naoki Yokoi, Seiji Muranaka, Toshihiko Nagai
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Publication number: 20020168879Abstract: A semiconductor device producing method that can clean an edge part of a semiconductor substrate with certainty is provided. The method of producing a semiconductor device includes a step of generating ions and a step of accelerating the ions by means of an electric field and radiating an ion flow onto an edge part of a semiconductor substrate to clean the edge part of the semiconductor substrate. The semiconductor substrate is moved relative to the ion flow while maintaining a state in which the ion flow is being radiated onto the edge part. The step of generating ions includes applying a high-frequency voltage between a pair of electrodes to generate the ions between the electrodes.Type: ApplicationFiled: October 22, 2001Publication date: November 14, 2002Applicant: Mitsubishi Denki Kabushiki Kaisha and Matsushita Electric Industrial Co., Ltd.Inventors: Hiroshi Tanaka, Naoki Yokoi, Yasuhiro Asaoka, Seiji Muranaka, Toshihiko Nagai
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Publication number: 20020146911Abstract: A method of manufacturing a semiconductor device, having a resist-removing step which is improved so as not to etch a peripheral material and damage the peripheral material is provided. A resist pattern is formed on a substrate. Using the resist pattern as a mask, the substrate is etched. A surface-deteriorated layer of the resist pattern is removed by a first chemicals treatment. A bulk portion of the resist pattern is removed by a second chemicals treatment.Type: ApplicationFiled: September 26, 2001Publication date: October 10, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Seiji Muranaka, Hiroshi Tanaka, Naoki Yokoi, Yasuhiro Asaoka, Toshihiko Nagai
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Patent number: 6451707Abstract: After forming a processed film onto the underlying film formed on the substrate, the processed film is dry etched using a mask pattern so as to form an etched pattern. After the reaction product deposited on a wall of the etched pattern is removed by using the first cleaning solution having relatively low power to etch the processed film and the second cleaning solution having relatively high power to etch the processed film in that order, the etched pattern or its vicinity is rinsed with water.Type: GrantFiled: December 5, 2000Date of Patent: September 17, 2002Assignee: Matsushita Electronics CorporationInventors: Toshihiko Nagai, Yuichi Miyoshi