Abstract: The objective of the present invention is to provide a software creating device and the like with which labor savings can be made when creating software. A software creating device according to the present invention creates software for controlling equipment such as a certification photograph machine. The software creating device 1 includes, for example: a storage part for storing a plurality of basic modules for executing each of a plurality of processes; and a software creating part for employing the basic modules to perform deep reinforcement learning to create, by part of a combination of the basic modules, software for consecutively performing the plurality of processes in equipment such as a certification photograph machine.

Abstract: A software creating device and the like can save labor when creating software. A software creating device can create software for controlling equipment such as a certification photograph machine. The software creating device includes, for example: a storage part for storing a plurality of basic modules for executing each of a plurality of processes; and a software creating part for employing the basic modules to perform deep reinforcement learning to create, by part of a combination of the basic modules, software for consecutively performing the plurality of processes in equipment such as a certification photograph machine.

Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.

Abstract: A semiconductor device includes a TSV that penetrates a silicon substrate. A seal ring is provided from a first low relative permittivity film that is closest to the silicon substrate to a second low relative permittivity film that is farthest from the silicon substrate. The seal ring is formed to surround the TSV in bird's eye view on the silicon substrate from a wafer front surface. This achieves suppression of generation or progress of a crack in a low relative permittivity film in a semiconductor device including the low relative permittivity film and a TSV.

Abstract: A semiconductor device includes a TSV that penetrates a silicon substrate. A seal ring is provided from a first low relative permittivity film that is closest to the silicon substrate to a second low relative permittivity film that is farthest from the silicon substrate. The seal ring is formed to surround the TSV in bird's eye view on the silicon substrate from a wafer front surface. This achieves suppression of generation or progress of a crack in a low relative permittivity film in a semiconductor device including the low relative permittivity film and a TSV.

Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.

Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.

Abstract: A semiconductor device includes a TSV that penetrates a silicon substrate. A seal ring is provided from a first low relative permittivity film that is closest to the silicon substrate to a second low relative permittivity film that is farthest from the silicon substrate. The seal ring is formed to surround the TSV in bird's eye view on the silicon substrate from a wafer front surface. This achieves suppression of generation or progress of a crack in a low relative permittivity film in a semiconductor device including the low relative permittivity film and a TSV.

Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.

Abstract: A semiconductor device includes a TSV that penetrates a silicon substrate. A seal ring is provided from a first low relative permittivity film that is closest to the silicon substrate to a second low relative permittivity film that is farthest from the silicon substrate. The seal ring is formed to surround the TSV in bird's eye view on the silicon substrate from a wafer front surface. This achieves suppression of generation or progress of a crack in a low relative permittivity film in a semiconductor device including the low relative permittivity film and a TSV.

Abstract: The fixing device includes a rotary member for contacting the unfixed toner image, a pressure member for forming the nip portion by contacting the rotary member, and a cover for covering the rotary member with a space between the rotary member and the cover. In a cross section of the fixing device, the cross section being orthogonal to a generatrix direction of the rotary member, the shortest distance (H) between the nip portion and a farthest surface portion of the rotary member farthest away from a surface portion forming the nip portion of the rotary member, the maximum width (W) of the rotary member in the conveyance direction of the recording member, and an area (S) of the space in a range of the maximum width W in the cross section satisfy with a relationship of S/W?0.7×H.

Abstract: The fixing device includes a rotary member for contacting the unfixed toner image, a pressure member for forming the nip portion by contacting the rotary member, and a cover for covering the rotary member with a space between the rotary member and the cover, wherein in a cross section of the fixing device, the cross section being orthogonal to a generatrix direction of the rotary member, wherein a shortest distance (H) between the nip portion and a farthest surface portion of the rotary member farthest away from a surface portion forming the nip portion of the rotary member, a maximum width (W) of the rotary member in the conveyance direction of the recording member, and an area (S) of the space in a range of the maximum width W in the cross section satisfy with a relationship of S/W?0.7×H.

Abstract: A semiconductor device includes a TSV that penetrates a silicon substrate. A seal ring is provided from a first low relative permittivity film that is closest to the silicon substrate to a second low relative permittivity film that is farthest from the silicon substrate. The seal ring is formed to surround the TSV in bird's eye view on the silicon substrate from a wafer front surface. This achieves suppression of generation or progress of a crack in a low relative permittivity film in a semiconductor device including the low relative permittivity film and a TSV.

Abstract: To provide a circuit layout design method that can prevent degradation of the circuit reliability even in highly miniaturized circuit cells. In order to prevent noise from a power supply potential or a reference potential with a large potential difference from affecting a gate electrode and causing a malfunction, a first plug connected to the gate electrode and a second plug to which the power supply potential or the reference potential is supplied are required to be spaced from each other by a distance sufficient for the noise from the power supply potential or the reference potential not to affect the first plug. To this end, among the second plugs placed at equal intervals under the wiring, only the second plug placed at a layout position that is not sufficiently spaced from the first plug is deleted at the time of planar layout design.

Abstract: To provide a circuit layout design method that can prevent degradation of the circuit reliability even in highly miniaturized circuit cells. In order to prevent noise from a power supply potential or a reference potential with a large potential difference from affecting a gate electrode and causing a malfunction, a first plug connected to the gate electrode and a second plug to which the power supply potential or the reference potential is supplied are required to be spaced from each other by a distance sufficient for the noise from the power supply potential or the reference potential not to affect the first plug. To this end, among the second plugs placed at equal intervals under the wiring, only the second plug placed at a layout position that is not sufficiently spaced from the first plug is deleted at the time of planar layout design.

Abstract: To provide a circuit layout design method that can prevent degradation of the circuit reliability even in highly miniaturized circuit cells. In order to prevent noise from a power supply potential or a reference potential with a large potential difference from affecting a gate electrode and causing a malfunction, a first plug connected to the gate electrode and a second plug to which the power supply potential or the reference potential is supplied are required to be spaced from each other by a distance sufficient for the noise from the power supply potential or the reference potential not to affect the first plug. To this end, among the second plugs placed at equal intervals under the wiring, only the second plug placed at a layout position that is not sufficiently spaced from the first plug is deleted at the time of planar layout design.

Abstract: To provide a circuit layout design method that can prevent degradation of the circuit reliability even in highly miniaturized circuit cells. In order to prevent noise from a power supply potential or a reference potential with a large potential difference from affecting a gate electrode and causing a malfunction, a first plug connected to the gate electrode and a second plug to which the power supply potential or the reference potential is supplied are required to be spaced from each other by a distance sufficient for the noise from the power supply potential or the reference potential not to affect the first plug. To this end, among the second plugs placed at equal intervals under the wiring, only the second plug placed at a layout position that is not sufficiently spaced from the first plug is deleted at the time of planar layout design.

Abstract: To provide a circuit layout design method that can prevent degradation of the circuit reliability even in highly miniaturized circuit cells. In order to prevent noise from a power supply potential or a reference potential with a large potential difference from affecting a gate electrode and causing a malfunction, a first plug connected to the gate electrode and a second plug to which the power supply potential or the reference potential is supplied are required to be spaced from each other by a distance sufficient for the noise from the power supply potential or the reference potential not to affect the first plug. To this end, among the second plugs placed at equal intervals under the wiring, only the second plug placed at a layout position that is not sufficiently spaced from the first plug is deleted at the time of planar layout design.

Abstract: An image-forming apparatus includes a movable lever which functions as a recording medium detector for detecting the passage of a recording medium and a temperature detecting portion provided on the movable lever. The temperature of the recording medium is detected without providing an additional space for a sensor for detecting the temperature of the recording medium.

Abstract: According to the present invention, a temperature sensing part of temperature sensing means is arranged to come into contact with the surface opposite to the image surface of a recording material at the time of one-sided printing without providing such an opposed member that comes into contact with the image surface of the recording material at least in a position corresponding to the position of the temperature sensing part that is in contact with the recording material.