Abstract: A one frequency repeater includes a receiver for receiving a reception signal through a receiving antenna, a variable frequency characteristic filter for generating a signal for cancelling an interference signal caused by leakage of a transmission signal into a receiving antenna, an adder for adding the interference signal and the reception signal, a demodulator for demodulating an output signal from the adder, a data converter for converting an output signal from the modulator, a modulator for modulating a carrier according to an output from the data converter, and a transmitter for transmitting from a transmitting antenna an output signal modulated by the modulator. The variable frequency characteristic filter receives the signal modulated by the modulator, is controlled in response to a control signal including the output from the data converter, and supplies the interference cancellation signal to the adder.

Abstract: In order to reset a cross-polarization interference canceller for use in a digital radio communications receiver, two polarized-signal discriminators are provided in a manner to be coupled respectively to receive reproduced digital data from the corresponding demodulators. In the event that the demodulator produces an output not characteristic thereof, the corresponding polarized-signal discriminator produces a reset signal to reset the canceller.

Abstract: In a multiple QAM system in which a pair of quadrature-phase carrier signals is modulated by a first and a second input digital signal, each representative of N or less levels, into a quadrature-phase amplitude modulated signal having M signal points on a phase plane where M is equal to N.sup.2, a code converting unit (41) converts the digital signals according to a predetermined rule into a first and a second modulating signal for use in modulating the carrier signals with the M signal points arranged approximately at a circle of a diameter which is shorter than a diagonal of a square of a side corresponding to the N levels. In a counterpart demodulating system, a pair of demodulated signals is derived from the amplitude modulated signal and converted into reproductions of the respective digital signals according to an inverse of the predetermined rule.

Abstract: A diversity system of the selection type for correcting phase ambiguities among a plurality of differentially encoded digital signals while retaining the digital encoding of those signals. With this system, no differential decoding/encoding means are needed in relay units of the system. Thus, differentially encoded digital signals may be sent through relay systems containing error correcting MODEMs without the additional complication of differential decoding/encoding circuitry.

Abstract: In an equalizer for equalizing, by the use of zero forcing algorithm, an input signal obtained by modulating a carrier wave of a carrier frequency at a modulation rate, a specific one of complex control signals is modified into a modified complex signal and supplied to a specific one of gain control circuits of a transversal filter corresponding to a specific one of additional taps except a central tap. The modified complex signal is produced by rotating a phase of the specific complex control signal by a step equal to an integral multiple of .pi./2. Specifically, at least one of real and imaginary parts of the modified complex signal is inverted relative to those of the specific complex control signal. The real and the imaginary parts of the modified control signal are delivered to in-phase and quadrature portions of the specific gain control circuit in consideration of the step.

Abstract: The present invention features a cross-polarization distortion canceller for use in a digital radio communication receiver, wherein error signal compensation is achieved by providing the baseband signals and the error signals using the same recovered signal or by using an error signal compensating circuit wherein carrier signals are compared in phase for generating adjusted error signals.

Abstract: In a demodulator for use in deriving demodulated signals from a modulated signal subjected to k-by-k quadrature amplitude-and-phase modulation where k is equal to 2.sup.N and N is an integer greater than unity, first and second detection signals, each having k-levels, are derived from the modulated signal by a coherent detecting circuit (21, 22, 24, 26, 28) and processed by first and second processing circuits (31, 32). Each of the first and the second processing circuits is implemented by a combination of (N-1) full-wave rectifier(s) (35) and N+2) binary detectors (34, 36-38; 42, 46-48) to produce each set of binary signals and each additional binary signal divisible into a pair of partial bit signals. Alternatively, each processing circuit is implemented by a combination of N full-wave rectifiers and first through (N+1)-th binary detectors. The first through the N-th detectors detect each set while the (N+1)-th detector, each additional binary signal.

Abstract: A demodulator features a circuit wherein a signal to effect carrier recovery and elimination of intersymbol interference etc. is produced by digitizing and processing demodulated signals in a manner that in the case of phase deviations due to noise or the like, the deviations fall within zones having predetermined digital identifications enabling the generation of appropriate digital correction signals via which the above mentioned signal production is controlled.

Abstract: An adaptive equalizer system for quadrature amplitude modulated waves is disclosed herein. The equalizer system comprises a circuit for equalizing the received signal as a function of a composite control signal; a circuit for generating a first control signal as a function of the deviation of the equalized signal from a zero-forced waveform; a circuit for generating a second control signal as a function of the asynchronization of the equalizer system; and an output circuit for processing both of said first control signal and said second control signal, producing the composite control signal which controls the equalizing means of the equalizer system.

Abstract: An amplitude equalizer is provided for equalizing amplitude distorted signals within a predetermined frequency band. The amplitude equalizer comprises first means for splitting signals into first and second split signals. A first delay device receives one of the two split signals, and a second signal splitter splits the output of the first delay device into third and fourth split signals, the third split signal being applied to a second delay device having a delay equal to the delay of the first delay device. The output of the second delay device is combined with the second output from the first signal splitter in a first signal combiner, the output of which is applied to a circuit for adjusting the polarity and gain of the signal applied thereto. The output of the polarity and gain adjusting circuit is applied to a second signal combiner which combines the adjusted signal with the fourth output from the second signal splitter to thereby provide equalized signals.

Abstract: An amplitude equalizer includes a pair of serially connected unit amplitude equalizers, each having complementary delay distortion characteristics to flatten the overall delay distortion characteristic. The unit equalizers include amplifiers or attenuators, delay circuits, and/or phase shifters. The amplitude versus frequency characteristic of the overall equalizer can be varied by controlling one or more of the attenuator/amplifiers and phase shifters. The variation can be controlled by a feedback circuit.