Patents by Inventor Toshihiko Sakai
Toshihiko Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11515439Abstract: A photovoltaic device includes: a semiconductor substrate stretching in a first direction and a second direction that intersects the first direction; and a first amorphous semiconductor film and a second amorphous semiconductor film both provided on the semiconductor substrate. The second amorphous semiconductor film has a differ conductivity type from the first amorphous semiconductor film. The first amorphous semiconductor film and the second amorphous semiconductor film are divided into a plurality of sections in the first direction and the second direction.Type: GrantFiled: December 11, 2020Date of Patent: November 29, 2022Assignee: SHARP KABUSHIKI KAISHAInventors: Teruaki Higo, Chikao Okamoto, Naoki Asano, Masamichi Kobayashi, Natsuko Fujiwara, Rihito Suganuma, Toshihiko Sakai, Kazuya Tsujino, Liumin Zou
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Patent number: 11435565Abstract: A projection system has a zooming function and is configured that light rays from a telecentric system enter. The projection system is formed of seven lens groups. The first and seventh lens groups are fixed when the projection magnification is changed, and the second, third, fourth, fifth, and the sixth lens groups move along the optical axis when the projection magnification is changed. The second lens group is formed of one positive lens. The third lens group is formed of one positive lens. The fourth lens group is formed of one or two positive lenses and one negative lens having the center of curvature located at the magnifying side. The fifth lens group is formed of one negative lens having a magnifying-side aspheric surface and a demagnifying-side aspheric surface with each of the surfaces having the center of curvature located at the demagnifying side.Type: GrantFiled: September 18, 2019Date of Patent: September 6, 2022Assignee: Seiko Epson CorporationInventors: Koji Shiokawa, Toshihiko Sakai
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Patent number: 11316061Abstract: n-type amorphous semiconductor layers (4) and p-type amorphous semiconductor layers (5) are alternately disposed on the back surface of a semiconductor substrate (1) so as to be separated from each other at a desired interval paralleled with the direction of the surface of the semiconductor substrate (1). An electrode (6) is disposed on the n-type amorphous semiconductor layer (4), and an electrode (7) is disposed on the p-type amorphous semiconductor layer (5). A protective film (8) includes an insulating film, and is disposed on a passivation film (3), the n-type amorphous semiconductor layer (4), the p-type amorphous semiconductor layer (5), and the electrodes (6, 7), so as to be in contact with the passivation film (3), the n-type amorphous semiconductor layer (4), the p-type amorphous semiconductor layer (5), and the electrodes (6, 7).Type: GrantFiled: October 15, 2020Date of Patent: April 26, 2022Assignee: SHARP KABUSHIKI KAISHAInventors: Takeshi Kamikawa, Masatomi Harada, Toshihiko Sakai, Tokuaki Kuniyoshi, Liumin Zou
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Patent number: 11227966Abstract: Provided is a photoelectric conversion device capable of suppressing diffusion of a dopant in a p layer or n layer into an adjacent layer. A photoelectric conversion device is provided with a silicon substrate, a substantially intrinsic amorphous layer formed on one surface of the silicon substrate, and a first conductive amorphous layer that is formed on the intrinsic amorphous layer. The first conductive amorphous layer includes a first concentration layer and a second concentration layer that is stacked on the first concentration layer. The dopant concentration of the second concentration layer is 8×1017 cm?3 or more, and is lower than the dopant concentration of the first concentration layer.Type: GrantFiled: April 3, 2015Date of Patent: January 18, 2022Assignee: SHARP KABUSHIKI KAISHAInventors: Masatomi Harada, Toshihiko Sakai, Rihito Suganuma, Kazuya Tsujino, Tokuaki Kuniyoshi, Takeshi Kamikawa
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Publication number: 20210272777Abstract: The present invention realizes a plasma treatment device with which a film deposition rate and film thickness of a film formed on a substrate can be made uniform. A plasma treatment device (1) includes: a plurality of antennas (20) for plasma generation arranged in a vacuum chamber (10); and a plurality of groups of multiple gas injection ports (30) arranged in the vicinity of lines (L1) that are substantially perpendicular to longitudinal directions (D1) of the plurality of antennas (20) and extend in a direction in which the plurality of antennas (20) are arranged with respect to each other. The plasma treatment device further includes a gas flow-rate control unit for controlling flow rates of gas injected from each of groups of the multiple gas injection ports (30).Type: ApplicationFiled: July 17, 2019Publication date: September 2, 2021Applicant: NISSIN ELECTRIC CO., LTD.Inventors: Toshihiko SAKAI, Daisuke AZUMA, Seiji NAKATA, Yasunori ANDO
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Publication number: 20210098638Abstract: A photovoltaic device includes: a semiconductor substrate stretching in a first direction and a second direction that intersects the first direction; and a first amorphous semiconductor film and a second amorphous semiconductor film both provided on the semiconductor substrate. The second amorphous semiconductor film has a differ conductivity type from the first amorphous semiconductor film. The first amorphous semiconductor film and the second amorphous semiconductor film are divided into a plurality of sections in the first direction and the second direction.Type: ApplicationFiled: December 11, 2020Publication date: April 1, 2021Inventors: TERUAKI HIGO, CHIKAO OKAMOTO, NAOKI ASANO, MASAMICHI KOBAYASHI, NATSUKO FUJIWARA, RIHITO SUGANUMA, TOSHIHIKO SAKAI, KAZUYA TSUJINO, LIUMIN ZOU
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Publication number: 20210050467Abstract: n-type amorphous semiconductor layers (4) and p-type amorphous semiconductor layers (5) are alternately disposed on the back surface of a semiconductor substrate (1) so as to be separated from each other at a desired interval paralleled with the direction of the surface of the semiconductor substrate (1). An electrode (6) is disposed on the n-type amorphous semiconductor layer (4), and an electrode (7) is disposed on the p-type amorphous semiconductor layer (5). A protective film (8) includes an insulating film, and is disposed on a passivation film (3), the n-type amorphous semiconductor layer (4), the p-type amorphous semiconductor layer (5), and the electrodes (6, 7), so as to be in contact with the passivation film (3), the n-type amorphous semiconductor layer (4), the p-type amorphous semiconductor layer (5), and the electrodes (6, 7).Type: ApplicationFiled: October 15, 2020Publication date: February 18, 2021Inventors: Takeshi Kamikawa, Masatomi Harada, Toshihiko Sakai, Tokuaki Kuniyoshi, Liumin Zou
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Patent number: 10903379Abstract: A photovoltaic device includes: a semiconductor substrate stretching in a first direction and a second direction that intersects the first direction; and a first amorphous semiconductor film and a second amorphous semiconductor film both provided on the semiconductor substrate. The second amorphous semiconductor film has a differ conductivity type from the first amorphous semiconductor film. The first amorphous semiconductor film and the second amorphous semiconductor film are divided into a plurality of sections in the first direction and the second direction. Therefore, the photovoltaic device has an improved heat resistance.Type: GrantFiled: March 7, 2016Date of Patent: January 26, 2021Assignee: SHARP KABUSHIKI KAISHAInventors: Teruaki Higo, Chikao Okamoto, Naoki Asano, Masamichi Kobayashi, Natsuko Fujiwara, Rihito Suganuma, Toshihiko Sakai, Kazuya Tsujino, Liumin Zou
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Patent number: 10895719Abstract: A projection system including seven lens groups sequentially arranged from an enlargement side, a first lens group having negative refractive power, a second lens group having positive refractive power, a third lens group having positive refractive power, a fourth lens group having negative refractive power, a fifth lens group having positive refractive power, a sixth lens group having positive refractive power, and a seventh lens group having positive refractive power, wherein ?dR that is a dispersion value of a lens that forms the seventh lens group out of the seven lens groups and is closest to a reduction side and ?dF that is a dispersion value of a lens that forms the first lens group out of the seven lens groups and is closest to the enlargement side satisfy a following conditional expression: 5<?dR??dF<30.Type: GrantFiled: November 9, 2017Date of Patent: January 19, 2021Assignee: SEIKO EPSON CORPORATIONInventors: Toshihiko Sakai, Koji Shiokawa
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Patent number: 10800444Abstract: Disclosed is an electric driving device in which: two positive-electrode-side power lines (32, 33) are arranged from an outer peripheral side to an inner side of a mounting substrate (19); power conversion circuits (36, 37; 44, 45; 46, 47) are arranged on both sides of the mounting substrate, with respect to the positive-electrode-side power lines, to perform drive control of an electric motor; and output terminals (52, 53) are arranged on the mounting substrate at a location outward of the power conversion circuit so as to establish a connection to the electric motor. As the power conversion circuits are disposed from the center to the periphery of the mounting substrate, it is possible to decrease the wiring length and circuit mounting area of the mounting substrate (19) and suppress a radial size increase of the mounting substrate on which the redundant power conversion circuits are mounted.Type: GrantFiled: July 22, 2016Date of Patent: October 13, 2020Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.Inventors: Tomishige Yatsugi, Toshihiko Sakai
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Patent number: 10658526Abstract: In a photovoltaic device (1), first amorphous semiconductor portions (102n) and second amorphous semiconductor portions (102p) are provided alternately on one of faces of a semiconductor substrate (101). Each first amorphous semiconductor portion (102n) has at least one first amorphous semiconductor strip (1020n), and each second amorphous semiconductor portion (102p) has at least one second amorphous semiconductor strip (1020p). A plurality of first electrodes (103n) are provided spaced apart from each other on each first amorphous semiconductor strip (1020n), and a plurality of second electrodes (103p) are provided spaced apart from each other on each second amorphous semiconductor strip (1020p).Type: GrantFiled: February 24, 2016Date of Patent: May 19, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Masatomi Harada, Kenichi Higashi, Takeshi Kamikawa, Toshihiko Sakai, Tokuaki Kuniyoshi, Kazuya Tsujino, Liumin Zou
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Publication number: 20200088977Abstract: A projection system has a zooming function and is configured that light rays from a telecentric system enter. The projection system is formed of seven lens groups. The first and seventh lens groups are fixed when the projection magnification is changed, and the second, third, fourth, fifth, and the sixth lens groups move along the optical axis when the projection magnification is changed. The second lens group is formed of one positive lens. The third lens group is formed of one positive lens. The fourth lens group is formed of one or two positive lenses and one negative lens having the center of curvature located at the magnifying side. The fifth lens group is formed of one negative lens having a magnifying-side aspheric surface and a demagnifying-side aspheric surface with each of the surfaces having the center of curvature located at the demagnifying side.Type: ApplicationFiled: September 18, 2019Publication date: March 19, 2020Applicant: SEIKO EPSON CORPORATIONInventors: Koji SHIOKAWA, Toshihiko SAKAI
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Publication number: 20200081230Abstract: A projection system including seven lens groups sequentially arranged from an enlargement side, a first lens group having negative refractive power, a second lens group having positive refractive power, a third lens group having positive refractive power, a fourth lens group having negative refractive power, a fifth lens group having positive refractive power, a sixth lens group having positive refractive power, and a seventh lens group having positive refractive power, wherein ?dR that is a dispersion value of a lens that forms the seventh lens group out of the seven lens groups and is closest to a reduction side and ?dF that is a dispersion value of a lens that forms the first lens group out of the seven lens groups and is closest to the enlargement side satisfy a following conditional expression: 5<?dR??dF<30.Type: ApplicationFiled: November 9, 2017Publication date: March 12, 2020Applicant: SEIKO EPSON CORPORATIONInventors: Toshihiko SAKAI, Koji SHIOKAWA
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Publication number: 20200023886Abstract: Disclosed is an electric driving device in which: two positive-electrode-side power lines (32, 33) are arranged from an outer peripheral side to an inner side of a mounting substrate (19); power conversion circuits (36, 37; 44, 45; 46, 47) are arranged on both sides of the mounting substrate, with respect to the positive-electrode-side power lines, to perform drive control of an electric motor; and output terminals (52, 53) are arranged on the mounting substrate at a location outward of the power conversion circuit so as to establish a connection to the electric motor. As the power conversion circuits are disposed from the center to the periphery of the mounting substrate, it is possible to decrease the wiring length and circuit mounting area of the mounting substrate (19) and suppress a radial size increase of the mounting substrate on which the redundant power conversion circuits are mounted.Type: ApplicationFiled: July 22, 2016Publication date: January 23, 2020Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.Inventors: Tomishige YATSUGI, Toshihiko SAKAI
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Patent number: 10536049Abstract: An object of the present invention is to reduce an inductance of a power circuit, reduce a switching loss and a noise level and improve a voltage-use ratio of a battery power in a redundant-type electronic control device. An electronic control device that controls a motor has power modules 11a, 11b to drive the motor. Power terminals 32pua, 32pva and 32pwa of the power module 11a are arranged in positions that are close to and face power terminals 32nub, 32nvb and 32nwb of the power module 11b, which are opposite to the power terminals 32pua, 32pva and 32pwa of the power module 11a in polarity. Power terminals 32nua, 32nva and 32nwa drawn from a longitudinal end portion 311 of the power module 11a are arranged in positions that are close to and face power terminals 32pub, 32pvb and 32pwb drawn from a longitudinal end portion 311 of the power module 11b which are opposite to the power terminals 32nua, 32nva and 32nwa of the power module 11a in polarity.Type: GrantFiled: September 10, 2015Date of Patent: January 14, 2020Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.Inventors: Toshihiko Sakai, Takuro Kanazawa, Ryoichi Kobayashi
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Patent number: 10516066Abstract: A photovoltaic conversion device (10) includes a semiconductor substrate (1), a passivation film (3), n-type amorphous semiconductor strips, p-type amorphous semiconductor strips (5p), and electrodes (7). The passivation film (3) is formed on one of the surfaces of the semiconductor substrate (1). The n- and p-type amorphous semiconductor strips are arranged alternately as viewed along an in-plane direction of the semiconductor substrate (1) (Y-axis direction). The p-type amorphous semiconductor strips (5p) have reduced-thickness regions (51) at some intervals as viewed along the length direction of the p-type amorphous semiconductor strips (5p) (X-axis direction). The n-type amorphous semiconductor strips have a similar structure. The electrodes (7) are provided on the p-type amorphous semiconductor strips (5p), but not in areas where the reduced-thickness regions (51) have a positive curvature r with respect to the length direction of the reduced-thickness regions (51).Type: GrantFiled: March 17, 2017Date of Patent: December 24, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Makoto Higashikawa, Toshihiko Sakai, Kazuya Tsujino, Liumin Zou, Teruaki Higo, Yuta Matsumoto
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Patent number: 10505064Abstract: A photovoltaic device and a photovoltaic module are provided that suppressing diffusion of boron and thereby improving conversion efficiency. A photovoltaic device 10 includes: a semiconductor substrate 1; an intrinsic amorphous semiconductor layer 3 provided on the semiconductor substrate 1; n-type amorphous semiconductor strips 4 containing phosphorus as a dopant; and p-type amorphous semiconductor strips 5 containing boron as a dopant, the n- and p-type amorphous semiconductor strips 4 and 5 being provided alternately on the intrinsic amorphous semiconductor layer 3 as viewed along an in-plane direction. Each n-type amorphous semiconductor strip 4 includes a reduced-thickness region TD(n) on a face thereof adjacent to one of the p-type amorphous semiconductor strips 5. Each p-type amorphous semiconductor strip 5 includes a reduced-thickness region TD(p) on a face thereof adjacent to one of the n-type amorphous semiconductor strips 4.Type: GrantFiled: August 30, 2016Date of Patent: December 10, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Tokuaki Kuniyoshi, Kenichi Higashi, Takeshi Kamikawa, Masatomi Harada, Toshihiko Sakai, Kazuya Tsujino, Liumin Zou
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Patent number: 10355145Abstract: A photovoltaic device (1) includes: an i-type amorphous semiconductor layer (102i) formed in contact with one of the surfaces of a semiconductor substrate (101); p-type amorphous semiconductor strips (102p) spaced apart from each other and provided on the i-type amorphous semiconductor layer (102i); and n-type amorphous semiconductor strips (102n) spaced apart from each other and provided on the i amorphous semiconductor layer (102i), each n-type amorphous semiconductor strip (102n) being adjacent to at least one of the p-type amorphous semiconductor strips (102p) as traced along an in-plane direction of the semiconductor substrate (101). The photovoltaic device (1) further includes electrodes (103) as a protection layer formed in contact with the i-type amorphous semiconductor layer (102) between adjacent p-type amorphous semiconductor strips (102p) and between adjacent n-type amorphous semiconductor strips (102n).Type: GrantFiled: February 24, 2016Date of Patent: July 16, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Masatomi Harada, Kenichi Higashi, Takeshi Kamikawa, Toshihiko Sakai, Tokuaki Kuniyoshi, Kazuya Tsujino, Liumin Zou
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Patent number: 10293368Abstract: A film-forming method for forming a thin film on a substrate includes a contact step, an external force removal step, and a film-forming step. At the contact step (step B), the substrate 30 and a member 31 in contact with one surface of the substrate is stacked, and the substrate 30 and the member 31 in contact with one surface of the substrate are placed under vacuum while an external force is applied in a direction in which the substrate 30 and the member 31 in contact with one surface of the substrate are stacked. At the external force removal step (step C), the external force is removed at atmospheric pressure or under vacuum. At a film-forming step (step E), a thin film is formed on the one surface or the other surface of the substrate 30.Type: GrantFiled: February 24, 2016Date of Patent: May 21, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Toshihiko Sakai, Takeshi Kamikawa, Masatomi Harada, Tokuaki Kuniyoshi, Liumin Zou
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Publication number: 20190103499Abstract: A photovoltaic conversion device (10) includes a semiconductor substrate (1), a passivation film (3), n-type amorphous semiconductor strips, p-type amorphous semiconductor strips (5p), and electrodes (7). The passivation film (3) is formed on one of the surfaces of the semiconductor substrate (1). The n- and p-type amorphous semiconductor strips are arranged alternately as viewed along an in-plane direction of the semiconductor substrate (1) (Y-axis direction). The p-type amorphous semiconductor strips (5p) have reduced-thickness regions (51) at some intervals as viewed along the length direction of the p-type amorphous semiconductor strips (5p) (X-axis direction). The n-type amorphous semiconductor strips have a similar structure. The electrodes (7) are provided on the p-type amorphous semiconductor strips (5p), but not in areas where the reduced-thickness regions (51) have a positive curvature r with respect to the length direction of the reduced-thickness regions (51).Type: ApplicationFiled: March 17, 2017Publication date: April 4, 2019Inventors: MAKOTO HIGASHIKAWA, TOSHIHIKO SAKAI, KAZUYA TSUJINO, LIUMIN ZOU, TERUAKI HIGO, YUTA MATSUMOTO