Patents by Inventor Toshihiko Shindo

Toshihiko Shindo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9780037
    Abstract: A plasma processing method can suppress both surface roughness of a wiring and surface roughness of a metal mask. The method includes generating plasma of a first processing gas containing a fluorocarbon gas and/or a hydrofluorocarbon gas to etch a diffusion barrier film until a copper wiring is exposed and generating plasma of a second processing gas containing a carbon-containing gas to form an organic film on a surface of a target object in which the diffusion barrier film is etched.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: October 3, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuya Kato, Toshihiko Shindo, Ryuichi Asako, Hiroshi Nagahata
  • Publication number: 20170084542
    Abstract: A plasma processing method can suppress both surface roughness of a wiring and surface roughness of a metal mask. The method includes generating plasma of a first processing gas containing a fluorocarbon gas and/or a hydrofluorocarbon gas to etch a diffusion barrier film until a copper wiring is exposed and generating plasma of a second processing gas containing a carbon-containing gas to form an organic film on a surface of a target object in which the diffusion barrier film is etched.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 23, 2017
    Inventors: Kazuya Kato, Toshihiko Shindo, Ryuichi Asako, Hiroshi Nagahata
  • Patent number: 8287750
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: October 16, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Toshihiko Shindo, Shin Okamoto, Kimihiro Higuchi
  • Patent number: 8263498
    Abstract: Disclosed is a semiconductor device fabricating method. A substrate is provided thereon with: an inorganic insulating film; a first inorganic sacrifice film stacked on the inorganic insulating film and having components different from those of the inorganic insulating film; a second sacrifice film formed of an inorganic insulative film stacked on the first sacrifice film, wherein a pattern for forming grooves for wiring embedment is formed in the second sacrifice film; and an organic layer including a photoresist film, wherein a pattern for forming holes for wiring embedment is formed in the organic film. According to the present invention, the thickness of the organic layer is set to be greater than the sum of the thicknesses of etch target films, i.e., the insulating film, the first sacrifice film and the second sacrifice film; the etch target films are etched in a selectivity-less manner by using plasma generated from a mixed gas of CF4 gas and CHF3 gas.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: September 11, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Ryukichi Shimizu, Akihiro Kikuchi, Toshihiko Shindo
  • Patent number: 7951513
    Abstract: A silicon single crystal film having a crystal plane as its principal plane, the crystal plane being inclined at 3 to 5° from any lattice plane belonging to {100} planes or {111} planes is used as a pellicle film. The silicon single crystal having such a crystal plane as its principal plane has effective bond density and Young's modulus thereof which are about 40% to about 50% higher than those of a silicon single crystal with <100> orientation, and therefore a cleavage and crack do not easily occur. Moreover, the silicon single crystal has a high chemical resistance such as hydrofluoric acid resistance, and hardly causes an etch pit and void. Accordingly, the present invention can provide a pellicle comprising a pellicle film for EUV having high transmission, and excellent mechanical and chemical stability, as well as having a high yield, and being practical also in cost.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: May 31, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshihiro Kubota, Shoji Akiyama, Toshihiko Shindo
  • Patent number: 7919217
    Abstract: A pellicle film of a silicon single crystal film and a base substrate supporting the pellicle film are formed of a single substrate using an SOI substrate. The base substrate is provided with an opening whose ratio in area to an exposure region when a pellicle is used on a photomask (an open area ratio) is 60% or more, and provided with a reinforcing frame in a non-exposure region of the base substrate. Since the pellicle film and the base substrate supporting the pellicle film are formed of the single substrate (an integrated structure), and the base substrate is provided with the reinforcing frame, the effect of increased strength is obtained. Moreover, a principal plane of a silicon single crystal film is a crystal plane inclined at 3 to 5° from any lattice plane belonging to {100} planes or {111} planes.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: April 5, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshihiro Kubota, Shoji Akiyama, Toshihiko Shindo
  • Patent number: 7799238
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: September 21, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Toshihiko Shindo, Shin Okamoto, Kimihiro Higuchi
  • Publication number: 20100112819
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Application
    Filed: January 13, 2010
    Publication date: May 6, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihiko SHINDO, Shin Okamoto, Kimihiro Higuchi
  • Publication number: 20090291372
    Abstract: A pellicle film of a silicon single crystal film and a base substrate supporting the pellicle film are formed of a single substrate using an SOI substrate. The base substrate is provided with an opening whose ratio in area to an exposure region when a pellicle is used on a photomask (an open area ratio) is 60% or more, and provided with a reinforcing frame in a non-exposure region of the base substrate. Since the pellicle film and the base substrate supporting the pellicle film are formed of the single substrate (an integrated structure), and the base substrate is provided with the reinforcing frame, the effect of increased strength is obtained. Moreover, a principal plane of a silicon single crystal film is a crystal plane inclined at 3 to 5° from any lattice plane belonging to {100} planes or {111} planes.
    Type: Application
    Filed: May 14, 2009
    Publication date: November 26, 2009
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshihiro KUBOTA, Shoji Akiyama, Toshihiko Shindo
  • Publication number: 20090274962
    Abstract: A silicon single crystal film having a crystal plane as its principal plane, the crystal plane being inclined at 3 to 5° from any lattice plane belonging to {100} planes or {111} planes is used as a pellicle film. The silicon single crystal having such a crystal plane as its principal plane has effective bond density and Young's modulus thereof which are about 40% to about 50% higher than those of a silicon single crystal with <100> orientation, and therefore a cleavage and crack do not easily occur. Moreover, the silicon single crystal has a high chemical resistance such as hydrofluoric acid resistance, and hardly causes an etch pit and void. Accordingly, the present invention can provide a pellicle comprising a pellicle film for EUV having high transmission, and excellent mechanical and chemical stability, as well as having a high yield, and being practical also in cost.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 5, 2009
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshihiro Kubota, Shoji Akiyama, Toshihiko Shindo
  • Publication number: 20090212017
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Application
    Filed: April 30, 2009
    Publication date: August 27, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihiko SHINDO, Shin Okamoto, Kimihiro Higuchi
  • Patent number: 7541283
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: June 2, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Toshihiko Shindo, Shin Okamoto, Kimihiro Higuchi
  • Publication number: 20080020585
    Abstract: To provide a manufacturing method for semiconductor manufacturing device that can suppress the development of striations when forming holes by etching an etch target film composed of an inorganic insulating film, a first sacrifice film stacked on this insulating film and having components different from those of the insulating film, a second sacrifice film formed of an inorganic insulating film, whereon a pattern for forming grooves for wiring embedment on the insulating film is formed. In a substrate including a photoresist film, wherein a pattern for forming holes for embedding the wiring material on the upper layer of the above etch target film, a thickness of the above organic layer is greater than a thickness of an etch target layer composed of the above insulating film, the above first sacrifice film and the above second sacrifice film, a mixed gas containing CF4 gas and CHF3 gas is converted into plasma, and the etch target layer is etched by using the plasma.
    Type: Application
    Filed: March 26, 2007
    Publication date: January 24, 2008
    Inventors: Ryukichi Shimizu, Akhiro Kikuchi, Toshihiko Shindo
  • Publication number: 20050142873
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Application
    Filed: February 28, 2005
    Publication date: June 30, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihiko Shindo, Shin Okamoto, Kimihiro Higuchi
  • Publication number: 20050106875
    Abstract: A plasma ashing method of an object to be processed removes a resist film therefrom in a processing vessel after etching a part of a low dielectric constant film with the resist film having a pattern thereon as a mask in the processing vessel. The plasma ashing method includes a first and a second ashing processes. The first ashing process removes deposits off an inner wall of the processing vessel by using a first processing gas including at least O2 gas while controlling the pressure in the processing vessel to be smaller than or equal to 20 mTorr. The second ashing process removes the resist film by using a second processing gas including at least O2 gas.
    Type: Application
    Filed: September 24, 2004
    Publication date: May 19, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kazuhiro Kubota, Yoshiki Igarashi, Shigeru Tahara, Shin Okamoto, Toshihiko Shindo, Yoshinobu Ooya
  • Patent number: 5663865
    Abstract: Proposed is a ceramic-based electrostatic chuck with built-in heater used in high-temperature processing of a semiconductor silicon wafer, which is capable of exhibiting excellent electrostatic attracting force even at a temperature at which conventional ceramic-based electrostatic chucks cannot exhibit high attracting force.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: September 2, 1997
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Nobuo Kawada, Ryoji Nakajima, Toshihiko Shindo, Takaaki Nagao