Abstract: [Problem] The present invention addresses the problem of providing an effective method for treating ulcers or fistulas of the intestinal tract that are caused by inflammatory bowel disease, etc. [Solution] Provided is a pharmaceutical composition for treating or preventing ulcers or fistulas in the intestinal tract, the pharmaceutical composition containing a therapeutically effective amount of a self-assembling peptide.

Abstract: When an access process request signal for access to a connection network, from a terminal which exists in the same coverage area shared by a plurality of radio base stations, is received by one of the radio base stations, an access point base station is determined according to the resource information of the radio base stations by the connection network so as to transmit to the terminal, an access process base station modification request signal which requests that the access process request signal be transmitted to the radio base station that serves as the determined access point base station.

Abstract: When an access process request signal for access to a connection network, from a terminal which exists in the same coverage area shared by a plurality of radio base stations, is received by one of the radio base stations, an access point base station is determined according to the resource information of the radio base stations by the connection network so as to transmit to the terminal, an access process base station modification request signal which requests that the access process request signal be transmitted to the radio base station that serves as the determined access point base station.

Abstract: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.

Abstract: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.

Abstract: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.

Abstract: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.

Abstract: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.

Abstract: Power wastefully consumed in a memory in standby state is reduced without lowering the speed of operation of reading data out of the memory. A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.

Abstract: A head lamp washer is disclosed, which is for use in a motor vehicle having a head lamp and a windshield washer for washing a windshield of the motor vehicle. The head lamp washer comprises a washing liquid spray system for spraying washing liquid over a face of the head lamp. The spray system has both a manual mode in which the spray system operates independently and an automatic mode in which the spray system operates in cooperation with the windshield washer. A manual mode setting switch causes the spray system to assume the manual mode when turned ON and an automatic mode setting switch causes the spray system to assume the automatic mode when turned ON. Under the operation mode, the washing liquid spraying starts when the operations of the windshield washer are counted to a predetermined number. The amount of washing liquid sprayed under the automatic mode is less than that sprayed under the manual mode.