Abstract: In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.

Abstract: A semiconductor integrated circuit device for minimizing clock skew over clock wiring shortened for reduced wiring delays. A plurality of stages of clock drivers are provided on clock wiring paths ranging from a clock generator to flip-flops. Clock lines connecting upper stage clock drivers are equalized in length in the form of a tree structure, and clock lines connecting lower stage clock drivers are made as short as possible.

Abstract: In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.

Abstract: A semiconductor integrated circuit device for minimizing clock skew over clock wiring shortened for reduced wiring delays. A plurality of stages of clock drivers are provided on clock wiring paths ranging from a clock generator to flip-flops. Clock lines connecting upper stage clock drivers are equalized in length in the form of a tree structure, and clock lines connecting lower stage clock drivers are made as short as possible.

Abstract: In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.

Abstract: A turbo decoder has a control portion, a decoding portion and the like. The control portion determines the repeating number of times of the calculation for the second likelihood Ra to obtain the repeating number of times in association with the condition of the communication environment. The decoding portion decodes the error-correction code by using the repeating number of times determined at the control portion so that the decoded data is obtained efficiently by performing the decode so as to correspond to the condition of the communication environment.

Abstract: In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.

Abstract: A semiconductor integrated circuit device for minimizing clock skew over clock wiring shortened for reduced wiring delays. A plurality of stages of clock drivers are provided on clock wiring paths ranging from a clock generator to flip-flops. Clock lines connecting upper stage clock drivers are equalized in length in the form of a tree structure, and clock lines connecting lower stage clock drivers are made as short as possible.

Abstract: In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.

Abstract: A plant-cultivating artificial material includes: a porous sintered body containing at least one of silica and alumina; and a substance being mainly composed of a bone material component or calcium phosphate. A process for producing the plant-cultivating artificial material includes the steps of: preparing a base material containing at least one of silica and alumina, and a miring substance mainly composed of at least one of bone material and an additive; forming a green body; and heating the green body to obtain a porous sintered body so as to hold a bone material component or calcium phosphate in the porous sintered body. The porous sintered body may include a nitric acid component. The process may include the step of bringing the porous sintered body into contact with a liquid containing a nitric acid component.

Abstract: A semiconductor integrated circuit device for minimizing clock skew over clock wiring shortened for reduced wiring delays. A plurality of stages of clock drivers are provided on clock wiring paths ranging from a clock generator to flip-flops. Clock lines connecting upper stage clock drivers are equalized in length in the form of a tree structure, and clock lines connecting lower stage clock drivers are made as short as possible.

Abstract: Base stations have a plurality of antenna devices and a radio communicating zone, respectively. Each base station transmits respective information signals multiplied with a first complex weight from one antenna device and multiplied with a second complex weight from the other antenna device, when the mobile station is within each of the communication zones. The base stations renew the first and the second complex weights based on the direction of the mobile station. One of the base stations determines the initial values of its first and second complex weights based on a direction information of the mobile station obtained when the mobile station was in the zone of the other base station, upon moving from one zone to the other zone.

Abstract: A CDMA communication system comprises a base station and a mobile station. In the mobile station, a pilot demodulator demodulates first and second pilot signals by reception path using antenna pilot demodulators. An antenna phase difference calculator determines phase difference Angle(n) for the first and second pilot signals on each reception path. By vector-adding phase difference Angle(1), Angle(2), . . ., Angle(n), average Angle_a is determined as the average phase difference Angle(1), Angle(2), . . . , Angle(n). This average Angle_a is used as the phase difference data for a feedback control in the base station.

Abstract: A correlator receives an inphase signal and a quadrature signal as incoming signals. In the correlator, a despreading circuit despreads the incoming signals using spreading codes. Further a complex conjugate multiplication circuit 60 multiplies the respective despread signals by the complex conjugate of pilot signals into synchronized signals. The synchronized signals corresponding to a predetermined number of symbols are averaged into average signals. Then the power of the average signals is calculated, and an auxiliary signal is generated by multiplying the power by a factor. On the other hand, the power of the despread signals is calculated, and the power corresponding to the predetermined number of symbols are averaged into an average power signal. The correlation output of the correlator is generated by adding the average power signal and the auxiliary signal. This correlator is immune to the frequency variation of its oscillator and noise.

Abstract: In order to provide a semiconductor IC unit such as a microprocessor, etc., which satisfies both fast operation and lower power consumption properties with its high quality kept, the semiconductor IC unit of the present invention is composed so as to include a main circuit (LOG) provided with transistors, which is formed on a semiconductor substrate, and a substrate bias controlling circuit (VBC) used for controlling a voltage to be applied to the substrate, and the main circuit includes switching transistors (MN1 and MP1) used for controlling a voltage to be applied to the substrate and control signals output from the substrate bias controlling circuit is entered to the gate of each of the switching transistors and the control signal is returned to the substrate bias controlling circuit.

Abstract: A semiconductor integrated circuit device for minimizing clock skew over clock wiring shortened for reduced wiring delays. A plurality of stages of clock drivers are provided on clock wiring paths ranging from a clock generator to flip-flops. Clock lines connecting upper stage clock drivers are equalized in length in the form of a tree structure, and clock lines connecting lower stage clock drivers are made as short as possible.

Abstract: The present invention relates to a process for manufacturing a toner comprising the step of melt-kneading a composition comprising a resin binder and a colorant using an open roller-type continuous kneader having heating and cooling functions. According to the process for manufacturing a toner, there can be manufactured a toner which is excellent in the dispersion of the colorant and/or wax, and a toner having controlled dispersibilities of the charge control agent and the wax.

Abstract: A color toner comprising (A) a resin binder comprising a polyester, as a main component, obtained by polycondensing a polyhydric alcohol component and a carboxylic acid component, wherein the polyhydric alcohol component comprises a compound represented by the formula (I): wherein R.sup.1 is an alkylene group having 2 to 4 carbon atoms; x and y are positive numbers, wherein a sum of x and y is from 1 to 16, in an amount of 5% by mol or more of an entire polyhydric alcohol component, and wherein the carboxylic acid component comprises 50% by mol or more of a dicarboxylic acid compound and 50% by mol or less of a tricarboxylic or higher polycarboxylic acid compound; (B) a releasing agent having an average diameter size of dispersed particles in the color toner of from 0.1 to 3 .mu.

Abstract: A prepreg for fiber-reinforced composite materials comprising (A) a reinforcing fiber having a modulus of elasticity of 200 GPa or more, (B) a fibrous thermoplastic resin having a modulus of elasticity of 100 GPa or less, and (C) a thermosetting matrix resin. The prepreg of the present invention does not only have excellent handling property equivalent to that of the prepreg with the conventional thermosetting resin as a matrix, but also gives excellent toughness to the resulting molded product without injuring the thermal and mechanical properties. Particularly, it has a high resistance to interlaminar fracture when exposed to impact, so that it is preferably used as a structural material for airplanes, etc.

Abstract: As a basic connection information determined on the basis of a basic information determined in advance between logic elements by paying attention to the flow of data, the present invention includes a structure for transferring data from one data element to another data element, a structure for transferring data from one data element to a plurality of data elements and a structure for transferring data from a plurality of data elements to one data element, decides the sequence of unidimensional placement of sets of elements as the object of the flow of data inside a logic circuit on the basis of these structures, and automatically and quickly determine the initial placement positions of the sets of elements from the sequence thus decided.