Patents by Inventor Toshihiro Matsuo

Toshihiro Matsuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7195221
    Abstract: Disclosed are a device with stabilization base and a video display apparatus. The stabilization base is movable between a use position and a storage position, and is locked in the use position so that it would not easily move. When no problem occurs even if the stabilization base is moved, the locking of the stabilization base in the use position can be canceled easily. The stabilization base (4) is movable between the use position where it is projected outwards in relation to an outer edge of a grounding portion of an apparatus main body (2) and the storage position where it is stored on the inner side in relation to an outer edge of the apparatus main body. The stabilization base in the use position is immovably locked by lock means (10), (10) provided in the apparatus main body, and the locking by the lock means is canceled by pressing from the lower side or a lateral side.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: March 27, 2007
    Assignee: Sony Corporation
    Inventors: Takaki Maeda, Mitsuru Nakamura, Toshihiro Matsuo, Yasuyuki Seki
  • Patent number: 7093042
    Abstract: A process program such as an erasing/programming program is stored in a boot mat in a nonvolatile memory operational in a boot mode specified after reset start, and a transfer control program for the process program is also stored therein in advance. With an action of setting control information to a predetermined register as trigger, the state of an on-chip CPU is changed from placed in execution of an optional user program to enabled for execution of a transfer control program in the boot mat, and the CPU is returned to the re-execution state of the optional program, after the process program is transferred to an on-chip RAM.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: August 15, 2006
    Assignees: Renesas Technology Corp., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Toshihiro Matsuo, Hiromichi Ishikura, Hirofumi Mukai, Naoki Yada
  • Publication number: 20050236535
    Abstract: Disclosed are a device with stabilization base and a video display apparatus. The stabilization base is movable between a use position and a storage position, and is locked in the use position so that it would not easily move. When no problem occurs even if the stabilization base is moved, the locking of the stabilization base in the use position can be canceled easily. The stabilization base (4) is movable between the use position where it is projected outwards in relation to an outer edge of a grounding portion of an apparatus main body (2) and the storage position where it is stored on the inner side in relation to an outer edge of the apparatus main body. The stabilization base in the use position is immovably locked by lock means (10), (10) provided in the apparatus main body, and the locking by the lock means is canceled by pressing from the lower side or a lateral side.
    Type: Application
    Filed: May 29, 2003
    Publication date: October 27, 2005
    Inventors: Takaki Maeda, Mitsuru Nakamura, Toshihiro Matsuo, Yasuyuki Seki
  • Patent number: 6573738
    Abstract: A probe (20) for a probe card that has a multi-layered structure, in which a probe shaft (22) is enclosed by a covering layer (24). The probe shaft (22) is made of conductive metal, and provided with a contact portion (22a) at a tip end for pressing onto a test body to measure electric connection of the test body. The contact portion (22a) is formed having a constant diameter, and retains the constant diameter even after being machined for reuse. The covering layer (24) is made of a material having a high Young's modulus to help counter stresses repeatedly applied to the probe shaft (22), and formed covering the entire external circumferential surface of the probe shaft (22) except for the contact portion (22a). The tip end of the covering layer (24) is tapered in order to deal with a test body with narrower pitches.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: June 3, 2003
    Assignee: Tokyo Cathode Laboratory Co., Ltd.
    Inventors: Toshihiro Matsuo, Shigezo Kudo
  • Publication number: 20030018463
    Abstract: There is disclosed a logical simulation method, comprising the steps of: executing simulation of 1 cycle; and proceeding to the execution of simulation for a next cycle without displaying a waveform indicating the simulation result of a cycle if the cycle is one for turning OFF a waveform display.
    Type: Application
    Filed: June 21, 2002
    Publication date: January 23, 2003
    Inventor: Toshihiro Matsuo
  • Publication number: 20020144035
    Abstract: A process program such as an erasing/programming program is stored in a boot mat in a nonvolatile memory operational in a boot mode specified after reset start, and a transfer control program for the process program is also stored therein in advance. With an action of setting control information to a predetermined register as trigger, the state of an on-chip CPU is changed from placed in execution of an optional user program to enabled for execution of a transfer control program in the boot mat, and the CPU is returned to the re-execution state of the optional program, after the process program is transferred to an on-chip RAM.
    Type: Application
    Filed: February 22, 2002
    Publication date: October 3, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Toshihiro Matsuo, Hiromichi Ishikura, Hirofumi Mukai, Naoki Yada