Abstract: A power supply circuit includes: an environment detecting circuit which detects an installation environment; and a voltage control circuit which makes a report of a power supply capability by performing fluctuation control of an output voltage in response to detection information of the environment detecting circuit.

Abstract: A method for diagnosing an information processing device includes issuing a first interrupt that is an interrupt specific to a CPU, transferring a control from processing of the first interrupt to a second interrupt that starts a dump collection function, and starting a dump collection on the basis of the second interrupt.

Abstract: An electronic device includes a communication connector, a determiner, and a setting controller. The communication connector includes a power supply terminal and a plurality of signal terminals. The determiner determines whether a device connected via the communication connector is a device capable of communicating according to a second communication standard, based on the potential of a predetermined signal terminal specified by a first communication standard but not specified by the second communication standard, among the signal terminals. The setting controller switches the setting related to a power supply signal input from the power supply terminal, according to the determination result of the determiner.

Abstract: An information processing apparatus includes: at least one access unit that issues a memory access request for a memory; an arbitration unit that arbitrates the memory access request issued from the access unit; a management unit that allows the access unit that is an issuance source of the memory access request according to a result of the arbitration made by the arbitration unit to perform a memory access to the memory; a processor that accesses the memory through at least one cache memory; and a timing adjusting unit that holds a process relating to the memory access request issued by the access unit for a holding time set in advance and cancels the holding of the process relating to the memory access request in a case where power of the at least one cache memory is turned off in the processor before the holding time expires.

Abstract: An AC adapter includes a conversion part, an output terminal, and a voltage adjusting circuit. The conversion part converts alternating current input to an input terminal into a direct current. The output terminal supplies the direct current to an electronic apparatus outside. The voltage adjusting circuit lowers a voltage of the output terminal by a predetermined voltage from a regular supply voltage in a term after the AC adapter is connected to the electronic apparatus until a predetermined time lapses.

Abstract: A system for supply of power source currents, the system includes: a power source input terminal configured to be supplied with a power source current; a plurality of power source output terminals, coupled to the power source input terminal in parallel, configured to output a power source current; a protecting circuit configured to protect a supply of a excessive power source current to the power source input terminal; a plurality of data signal terminals each corresponding to one of the plurality of power source output terminals; and a connector coupled to at least one pair of one of the plurality of power source output terminals and one of the plurality of data signal terminals.

Abstract: A power supply circuit includes: an environment detecting circuit which detects an installation environment; and a voltage control circuit which makes a report of a power supply capability by performing fluctuation control of an output voltage in response to detection information of the environment detecting circuit.

Abstract: An electronic device includes a communication connector, a determiner, and a setting controller. The communication connector includes a power supply terminal and a plurality of signal terminals. The determiner determines whether a device connected via the communication connector is a device capable of communicating according to a second communication standard, based on the potential of a predetermined signal terminal specified by a first communication standard but not specified by the second communication standard, among the signal terminals. The setting controller switches the setting related to a power supply signal input from the power supply terminal, according to the determination result of the determiner.

Abstract: A differential path replacement component includes: a first signal line that comprises one end and the other end; and a second signal line that comprises one end adjacent to one end of the first signal line and the other end adjacent to the other end of the first signal line, that transmits a signal having a phase opposite to a phase of a signal transmitted through the first signal line, and that is paired with the first signal line. The first and second signal lines are twisted together such that an arranged sequence of one end of the first signal line and one end of the second signal line is reversed to an arranged sequence of the other end of the first signal line and the other end of the second signal line.

Abstract: An electronic apparatus includes a processor and a memory coupled to the processor. The processor executes a process including calculating a first accumulated time during which the battery device feeds power to the electronic apparatus while being attached to the electronic apparatus in a first attachment state in which a first surface of the battery device faces a reference surface provided in the electronic apparatus, calculating a second accumulated time during which the battery device feeds power to the electronic apparatus while being attached to the electronic apparatus in a second attachment state in which a second surface of the battery device faces the reference surface, the second surface being different from the first surface, and providing an instruction to change an attachment state of the battery device when a difference between the first accumulated time and the second accumulated time exceeds a given time.

Abstract: An information processing apparatus includes: at least one access unit that issues a memory access request for a memory; an arbitration unit that arbitrates the memory access request issued from the access unit; a management unit that allows the access unit that is an issuance source of the memory access request according to a result of the arbitration made by the arbitration unit to perform a memory access to the memory; a processor that accesses the memory through at least one cache memory; and a timing adjusting unit that holds a process relating to the memory access request issued by the access unit for a holding time set in advance and cancels the holding of the process relating to the memory access request in a case where power of the at least one cache memory is turned off in the processor before the holding time expires.

Abstract: An electronic apparatus includes a processor and a memory coupled to the processor. The processor executes a process including calculating a first accumulated time during which the battery device feeds power to the electronic apparatus while being attached to the electronic apparatus in a first attachment state in which a first surface of the battery device faces a reference surface provided in the electronic apparatus, calculating a second accumulated time during which the battery device feeds power to the electronic apparatus while being attached to the electronic apparatus in a second attachment state in which a second surface of the battery device faces the reference surface, the second surface being different from the first surface, and providing an instruction to change an attachment state of the battery device when a difference between the first accumulated time and the second accumulated time exceeds a given time.

Abstract: A system for supply of power source currents, the system includes: a power source input terminal configured to be supplied with a power source current; a plurality of power source output terminals, coupled to the power source input terminal in parallel, configured to output a power source current; a protecting circuit configured to protect a supply of a excessive power source current to the power source input terminal; a plurality of data signal terminals each corresponding to one of the plurality of power source output terminals; and a connector coupled to at least one pair of one of the plurality of power source output terminals and one of the plurality of data signal terminals.

Abstract: A circuit board includes a wiring substrate, a circuit that operates with a power from a first power supply and is provided on the wiring substrate, the circuit including a degrading component that degrades by being in a non-electrified state, a second power supply provided on the wiring substrate, an electrification control part that is provided on the wiring substrate and configured to intermittently electrify at least the degrading component by using a power from the second power supply.

Abstract: An AC adapter includes a conversion part, an output terminal, and a voltage adjusting circuit. The conversion part converts alternating current input to an input terminal into a direct current. The output terminal supplies the direct current to an electronic apparatus outside. The voltage adjusting circuit lowers a voltage of the output terminal by a predetermined voltage from a regular supply voltage in a term after the AC adapter is connected to the electronic apparatus until a predetermined time lapses.

Abstract: A memory device includes a single or a plurality of memory chips. In the memory device (memory module), the single memory chip or each of the plurality of memory chips has a memory part storing control data such as specification data and function data, and control data stored on the memory part is rewritable. Control data stored on the memory part separately disposed on each memory chip enables separate use of the memory chip, which improves compatibility and flexibility of the memory.

Abstract: A memory device having a single or a plurality of memory chips includes a memory part (control register, SPD memory unit) inside each memory chip, which memory part stores control data concerning the memory chip. The memory device enables writing-in or readout of the control data stored on the memory part to be able to set any desired control data for each memory chip, and, when the memory device has the plurality of memory chips, enables separate use of each of the memory chips.

Abstract: A differential path replacement component includes: a first signal line that comprises one end and the other end; and a second signal line that comprises one end adjacent to one end of the first signal line and the other end adjacent to the other end of the first signal line, that transmits a signal having a phase opposite to a phase of a signal transmitted through the first signal line, and that is paired with the first signal line. The first and second signal lines are twisted together such that an arranged sequence of one end of the first signal line and one end of the second signal line is reversed to an arranged sequence of the other end of the first signal line and the other end of the second signal line.

Abstract: A substantially enriched mammalian hematopoietic cell subpopulation is provided, which is characterized by progenitor cell activity for myeloid lineages, but lacking the potential to differentiate into lymphoid lineages. This population is further divided into specific myeloid progenitor subsets, including a common myeloid progenitor cells (CMP), megakaryocyte/erythroid progenitor cells (MEP) and granulocyte/monocyte lineage progenitor (GMP). Methods are provided for the isolation and culture of these subpopulations. The CMP population gives rise to all myeloid lineages, and can give rise to the two additional and isolatable progenitor populations that are exclusively committed to either the erythroid/megakaryocytic or myelomonocytic lineages. T?? ???? ????????? ????o?? ????o???????? ???? ??????????o????? T??-1; ???I?-7 P?, in conjunction with other markers expressed on lineage committed cells.

Abstract: A data recording apparatus, which is capable of acquiring and recording data according to the residual capacity of the battery when the residual capacity is small. A recording operation is carried out such that acquired information data is temporarily written onto the memory and thereafter the information data is transferred to a recording medium to record the information data. The data recording speed of the recording medium is detected. The residual capacity of the battery is detected. The expected driving time period for which the data recording apparatus can be driven is detected, based on the detected residual capacity. The quantity of data recordable on the recording medium is calculated based on the detected data recording speed and the detected expected driving time period. The size of data to be written onto the memory is changed based on the detected recordable quantity of data.