Patents by Inventor Toshihiro Nitta

Toshihiro Nitta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9959051
    Abstract: A storage system includes an expander sequence including a plurality of expanders coupled in series, a plurality of storage devices coupled to the expander sequence, first and second initiator devices coupled to the expander sequence, and a processor. The processor selects an optimal path, with respect to a transmission destination device of a command among the plurality of storage devices and the plurality of expanders, between the optimal path which is an initiator device with fewer expanders in a distance to the transmission destination device and a roundabout path which is an initiator device with more expanders in a distance to the transmission destination device, and transmits the command to the transmission destination device through the selected optimal path.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: May 1, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Koji Washiya, Toshihiro Nitta
  • Patent number: 9513639
    Abstract: To derive a feasible solution for an operation plan problem for storage tanks for storing liquefied natural gas, which is a complicated mixed-integer non-linear problem, given tank initial state information, reception plan information, and feed plan information, two solving processes are executed alternately two or more times, respectively: a first solving process that replaces a mixed-integer non-linear programming problem with a mixed-integer linear programming problem by linear approximation of a non-linear expression in non-linear constraints containing the non-linear expression, and solves the problem to derive provisional solutions or final solutions for a reception pattern that prescribes a storage tank that is to receive liquefied natural gas, and a discharge pattern that prescribes a storage tank that is to discharge liquefied natural gas, and a second solving process that replaces a mixed-integer non-linear programming problem with a continuous non-linear programming problem by provisionally fixing
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: December 6, 2016
    Assignee: OSAKA GAS CO., LTD.
    Inventors: Kenji Tsuzaki, Kaoru Kawamoto, Tomohito Okamura, Hiromasa Tani, Tomokazu Ueda, Nobuaki Hashimoto, Keisuke Kawata, Takahito Tanabe, Kouhei Harada, Atsushi Nitanda, Toshihiro Nitta
  • Publication number: 20160011780
    Abstract: A storage system includes an expander sequence including a plurality of expanders coupled in series, a plurality of storage devices coupled to the expander sequence, first and second initiator devices coupled to the expander sequence, and a processor. The processor selects an optimal path, with respect to a transmission destination device of a command among the plurality of storage devices and the plurality of expanders, between the optimal path which is an initiator device with fewer expanders in a distance to the transmission destination device and a roundabout path which is an initiator device with more expanders in a distance to the transmission destination device, and transmits the command to the transmission destination device through the selected optimal path.
    Type: Application
    Filed: September 5, 2013
    Publication date: January 14, 2016
    Inventors: Koji WASHIYA, Toshihiro NITTA
  • Publication number: 20140303792
    Abstract: To derive a feasible solution for an operation plan problem for storage tanks for storing liquefied natural gas, which is a complicated mixed-integer non-linear problem, given tank initial state information, reception plan information, and feed plan information, two solving processes are executed alternately two or more times, respectively: a first solving process that replaces a mixed-integer non-linear programming problem with a mixed-integer linear programming problem by linear approximation of a non-linear expression in non-linear constraints containing the non-linear expression, and solves the problem to derive provisional solutions or final solutions for a reception pattern that prescribes a storage tank that is to receive liquefied natural gas, and a discharge pattern that prescribes a storage tank that is to discharge liquefied natural gas, and a second solving process that replaces a mixed-integer non-linear programming problem with a continuous non-linear programming problem by provisionally fixing
    Type: Application
    Filed: October 19, 2012
    Publication date: October 9, 2014
    Applicant: OSAKA GAS Co., Ltd.
    Inventors: Kenji Tsuzaki, Kaoru Kawamoto, Tomohito Okamura, Hiromasa Tani, Tomokazu Ueda, Nobuaki Hashimoto, Keisuke Kawata, Takahito Tanabe, Kouhei Harada, Atsushi Nitanda, Toshihiro Nitta
  • Patent number: 8631282
    Abstract: Each of SAS expanders (“expander(s)” hereinafter) has a switch device for switching whether to bypass the expander in each communication path or not. Of the plurality of switch devices, an actual connection destination of a switch device bypassing the expander is a switch device in a upper-level and/or a lower-level of the switch device. Of the plurality of switch devices, an actual connection destination of a switch device that does not bypass an expander is the expander.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: January 14, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Tomoaki Kurihara, Toshihiro Nitta
  • Patent number: 8307157
    Abstract: Proposed are a disk array system and a traffic control method with which reliability can be improved by preventing system shutdown. A disk array system comprises a controller for controlling data I/O to and from a backend unit; a plurality of expanders provided in the backend unit and connected to the controller by way of a tree-structure topology; a plurality of storage devices provided in the backend unit and each connected to the corresponding expander; and a control unit for controlling the controller on the basis of an I/O request from a host device. The disk array system is configured such that the controller notifies the control unit of a link fault that has occurred in the backend unit, and the control unit, when supplied with the link fault notification from the controller, restricts issuance of I/O requests from the host device or restricts receipt of I/O requests sent from the host device as necessary.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: November 6, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Yuki Sakuma, Toshihiro Nitta, Midori Kurokawa
  • Publication number: 20120233399
    Abstract: The present invention aims to improve the performance of a storage apparatus. A controller of a storage apparatus stores therein for each piece of information indicating a communication rate in association with identification of the information piece, and performs speed negotiation for setting a communication rate with an expander upon detecting that coupling to the expander via a communication path has been established. The expander transmits identification information associated with its own maximum communication rate to the controller. The controller acquires the maximum communication rate of the expander on the basis of the identification information, obtains an expected value of the communication rate with the expander on the basis of the maximum communication rate of the expander and the maximum communication rate of the controller, and compares the communication rate set by the speed negotiation with the expected value.
    Type: Application
    Filed: March 9, 2011
    Publication date: September 13, 2012
    Inventors: Midori Kurokawa, Toshihiro Nitta
  • Publication number: 20120137166
    Abstract: Each of SAS expanders (“expander(s)” hereinafter) has a switch device for switching whether to bypass the expander in each communication path or not. Of the plurality of switch devices, an actual connection destination of a switch device bypassing the expander is a switch device in a upper-level and/or a lower-level of the switch device. Of the plurality of switch devices, an actual connection destination of a switch device that does not bypass an expander is the expander.
    Type: Application
    Filed: November 30, 2010
    Publication date: May 31, 2012
    Inventors: Tomoaki Kurihara, Toshihiro Nitta
  • Publication number: 20120047325
    Abstract: Proposed are a disk array system and a traffic control method with which reliability can be improved by preventing system shutdown. A disk array system comprises a controller for controlling data I/O to and from a backend unit; a plurality of expanders provided in the backend unit and connected to the controller by way of a tree-structure topology; a plurality of storage devices provided in the backend unit and each connected to the corresponding expander; and a control unit for controlling the controller on the basis of an I/O request from a host device. The disk array system is configured such that the controller notifies the control unit of a link fault that has occurred in the backend unit, and the control unit, when supplied with the link fault notification from the controller, restricts issuance of I/O requests from the host device or restricts receipt of I/O requests sent from the host device as necessary.
    Type: Application
    Filed: April 21, 2010
    Publication date: February 23, 2012
    Applicant: HITACHI, LTD.
    Inventors: Yuki Sakuma, Toshihiro Nitta, Midori Kurokawa
  • Patent number: 7279810
    Abstract: With a storage system including a drive and a controller, which are connected to each other via cables, and with a method for controlling the storage system, an emergency power supply voltage for a power failure at the drive is multiplexed at the controller with a first signal to be sent to the drive, and the resultant emergency power supply voltage is sent via the cable to the drive. When a power failure occurs at the drive, the drive is powered with the emergency power supply voltage sent from the controller, and specified power failure information is multiplexed at the drive with a second signal to be sent to the controller, and the resultant power failure information is then sent via the cable to the controller; and specified processing is executed at the controller in response to the power failure information sent from the drive via the cable.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: October 9, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Toshihiro Nitta
  • Publication number: 20060238032
    Abstract: With a storage system including a drive and a controller, which are connected to each other via cables, and with a method for controlling the storage system, an emergency power supply voltage for a power failure at the drive is multiplexed at the controller with a first signal to be sent to the drive, and the resultant emergency power supply voltage is sent via the cable to the drive. When a power failure occurs at the drive, the drive is powered with the emergency power supply voltage sent from the controller, and specified power failure information is multiplexed at the drive with a second signal to be sent to the controller, and the resultant power failure information is then sent via the cable to the controller; and specified processing is executed at the controller in response to the power failure information sent from the drive via the cable.
    Type: Application
    Filed: June 24, 2005
    Publication date: October 26, 2006
    Inventor: Toshihiro Nitta
  • Patent number: 6661594
    Abstract: A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: December 9, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Satoh, Seiichi Mita, Shoichi Miyazawa, Terumi Takashi, Yosuke Hori, Yoshiju Watanabe, Akihiko Hirano, Satoshi Minoshima, Hideki Miyasaka, Toshihiro Nitta, Tomoaki Hirai, Ryushi Shimokawa, Koji Shida, Yasuhide Ouchi
  • Publication number: 20030035236
    Abstract: A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
    Type: Application
    Filed: October 23, 2002
    Publication date: February 20, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Naoki Satoh, Seiichi Mita, Shoichi Miyazawa, Terumi Takashi, Yosuke Hori, Yoshiju Watanabe, Akihiko Hirano, Satoshi Minoshima, Hideki Miyasaka, Toshihiro Nitta, Tomoaki Hirai, Ryushi Shimokawa, Koji Shida, Yasuhide Ouchi
  • Publication number: 20010009483
    Abstract: A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
    Type: Application
    Filed: February 20, 2001
    Publication date: July 26, 2001
    Inventors: Naoki Satoh, Seiichi Mita, Shoichi Miyazawa, Terumi Takashi, Yosuke Hori, Yoshiju Watanabe, Akihiko Hirano, Satoshi Minoshima, Hideki Miyasaka, Toshihiro Nitta, Tomoaki Hirai, Ryushi Shimokawa, Koji Shida, Yasuhide Ouchi
  • Patent number: 5818655
    Abstract: A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: October 6, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Satoh, Seiichi Mita, Shoichi Miyazawa, Terumi Takashi, Yosuke Hori, Yoshiju Watanabe, Akihiko Hirano, Satoshi Minoshima, Hideki Miyasaka, Toshihiro Nitta, Tomoaki Hirai, Ryushi Shimokawa, Koji Shida, Yasuhide Ouchi