Patents by Inventor Toshihiro Shimizu

Toshihiro Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210060948
    Abstract: A liquid ejecting head including a flow path forming substrate in which a pressure chamber is formed, a diaphragm, and a piezoelectric actuator. The piezoelectric actuator includes an active portion in which a piezoelectric layer is interposed between a first electrode and a second electrode. The active portion, in plan view, overlaps at least a portion of the pressure chamber and is provided so as to extend to an outside of the pressure chamber. The pressure chamber is formed so that, the closer to the piezoelectric actuator in a layered direction of the flow path forming substrate and the diaphragm, a width of the pressure chamber in a direction intersecting the layered direction becomes smaller.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 4, 2021
    Inventors: Harunobu KOIKE, Masao NAKAYAMA, Toshihiro SHIMIZU
  • Publication number: 20200406619
    Abstract: A liquid ejecting apparatus is provided comprising: a liquid ejecting head; and a controller. The liquid ejecting head including: a nozzle from which a liquid is ejected; a first communication passage that is in communication with the first nozzle; a first pressure compartment; a first drive element that changes a pressure of the first pressure compartment; a first passage that connects the first pressure compartment and the first communication passage; a second pressure compartment; a second drive element that changes a pressure of the second pressure compartment; a second passage that connects the second pressure compartment and the first communication passage.
    Type: Application
    Filed: September 10, 2020
    Publication date: December 31, 2020
    Inventors: Hiromu Miyazawa, Toshihiro Shimizu
  • Publication number: 20200410340
    Abstract: An information processing device includes: a processor configured to: calculate a combination of t and q minimizing a computation time when q computation cores compute convolution between first matrices and second matrices of t-row t-column with Winograd algorithm in parallel, where a total number of elements of the first and second matrices does not exceed a number of sets of data that can be stored in each of q storage areas of a register, and the q computation cores correspond to the q storage areas; and output a program for causing a computing machine including the q computation cores and the register to execute a process including: storing the first and second matrices in each of the q storage areas with a calculated combination of t and q, and computing convolution between the first matrix and the second matrix with the Winograd algorithm by each of the q computation cores.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 31, 2020
    Applicant: FUJITSU LIMITED
    Inventor: Toshihiro Shimizu
  • Patent number: 10864726
    Abstract: A liquid ejecting head includes: a nozzle from which a liquid is ejected; a communication passage that is in communication with the nozzle; a first pressure compartment that is connected to the communication passage through a first passage; a second pressure compartment that is connected to the communication passage through a second passage; a first drive element that changes pressure of the first pressure compartment; and a second drive element that changes pressure of the second pressure compartment.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: December 15, 2020
    Inventors: Hiromu Miyazawa, Toshihiro Shimizu
  • Patent number: 10721127
    Abstract: A communication system includes a plurality of leaf switches connected to a plurality of spine switches in topology of a Latin square Fat-Tree, and a plurality of information processing apparatus, wherein each of the information processing apparatuses performs first all reducing, wherein each of first information processing apparatuses performs second all reducing, on the basis of the result of the first all reducing, between the first information processing apparatus and another first information processing apparatus connected to a leaf switch connected to a first spine switch corresponding to a first direction in an area, wherein each of the first information processing apparatuses performs third all reducing, on the basis of the result of the second all reducing, between the first information processing apparatus and another first information processing apparatus connected to a leaf switch connected to a second spine switch corresponding to a second direction in the area.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: July 21, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Patent number: 10686117
    Abstract: A piezoelectric element includes a first electrode disposed over a substrate, an orientation control layer disposed over the first electrode and containing titanium, a piezoelectric layer disposed over the orientation control layer and having a perovskite crystal structure, and a second electrode disposed over the piezoelectric layer. The orientation control layer has a thickness in the range of 5.0 nm to 22.0 nm.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: June 16, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Koichi Morozumi, Hiromu Miyazawa, Toshihiro Shimizu, Ichiro Asaoka
  • Patent number: 10618283
    Abstract: A piezoelectric device includes a pressure chamber forming substrate in which a pressure chamber empty portion is formed, a vibrating plate that is formed on the pressure chamber forming substrate, corresponding to the pressure chamber empty portion, and a piezoelectric element that is formed on the vibrating plate, corresponding to the pressure chamber empty portion, in which the vibrating plate is provided with a concave portion having a bottom portion which is overlapped with the pressure chamber empty portion, and is larger than the pressure chamber empty portion in a planar view, and a wall portion which surrounds the bottom portion, on the pressure chamber empty portion side, the wall portion has a curved surface that is inclined to widen in a direction toward the pressure chamber empty portion from the bottom portion, and a curvature radius of the curved surface is 60 nm to 1000 nm.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: April 14, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Takashi Kasahara, Masao Nakayama, Takeshi Saito, Yoshihiro Hokari, Toshihiro Shimizu, Naoto Yokoyama
  • Patent number: 10616140
    Abstract: An information processing system includes a plurality of switches connected to each other in a form of a full mesh and a plurality of information processing apparatuses respectively connected to any one of the plurality of switches. A first information processing apparatus of the plurality of information processing apparatuses includes a processor. The processor is configured to generate a second identifier by calculating an exclusive OR of a first identifier and a first number corresponding to a communication phase. The first identifier identifies a first switch connected to the first information processing apparatus. The first number is included in a set of linearly independent numbers allocated to the first information processing apparatus. The processor is configured to perform communication with a second information processing apparatus of the plurality of information processing apparatuses. The second information processing apparatus is connected to a second switch having the second identifier.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: April 7, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Patent number: 10594626
    Abstract: An information processing system includes leaf switches connected in a form of a Latin square fat tree, information processing apparatuses connected to any one of the leaf switches, respectively, and a management apparatus including a first processor. The first processor extracts one or more rows and one or more columns from a lattice portion other than an infinite original point of a finite projection plane corresponding to the Latin square fat tree. The first processor specifies leaf switches corresponding to points included in the extracted one or more rows and included in the extracted one or more columns. The first processor transmits an instruction to execute an all-reduce communication, in which a result of the communication is shared by all members that execute the communication, to a predetermined number of information processing apparatuses among the information processing apparatuses connected to the specified leaf switches.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: March 17, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Publication number: 20200066251
    Abstract: A message management unit receives and accumulates a message, wherein the message is distributed for every update, is the message data representing a latest situation of a competition, an explanation generation unit generates an explanatory text for conveying unconveyed information detected from the message, based on conveyed information, a speech synthesis unit outputs a speech converted from the explanatory text, wherein the explanation generation unit stores the unconveyed information for the explanatory text as the conveyed information, stands by until completion of completion of the speech, and initiates a procedure for generating a new explanatory text based on updated unconveyed information.
    Type: Application
    Filed: May 23, 2018
    Publication date: February 27, 2020
    Applicants: NIPPON HOSO KYOKAI, NHK Engineering System, Inc.
    Inventors: Tadashi KUMANO, Ichiro YAMADA, Atsushi IMAI, Hideki SUMIYOSHI, Yuko YAMANOUCHI, Toshihiro SHIMIZU, Nobumasa SEIYAMA, Shoei SATO, Reiko SAITO, Taro MIYAZAKI, Kiyoshi KURIHARA, Manon ICHIKI, Tohru TAKAGI
  • Patent number: 10574478
    Abstract: An information processing system includes Spine switches, Leaf switches coupled to the Spine switches in a form of a Latin square fat tree, and apparatuses each coupled to any one of the Leaf switches and including a processor. The processor performs, in a case where the processor is included in one of first apparatuses coupled to one of first Leaf switches, first collective communication with others of the first apparatuses on a route via a first Spine switch. The first Leaf switches correspond to at least a portion of points other than points at infinity of a finite projective plane corresponding to the Latin square fat tree. The processor performs second collective communication with others of the first apparatuses on a route via a second Spine switch at each phase of the first collective communication. The second Spine switch is different from the first Spine switch.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: February 25, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Patent number: 10554535
    Abstract: An apparatus stores connection information indicating connection relationship among topological structures in a network, in which first-type topological structures are coupled to second-type topological structures. The apparatus stores first transfer-patterns each indicating a combination of input and output ports for performing all-to-all communication without path conflict in each of the first-type topological structures, and second transfer-patterns each indicating a combination of input and output ports for performing all-to-all communication without path conflict in each of the second-type topological structures.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: February 4, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Patent number: 10516596
    Abstract: A system includes spine switches, leaf switches, information processing apparatuses, and a processor configured to allocate a first leaf switch group to a first job, the first leaf switch group corresponding to a first column in a lattice part including points other than points at infinity of a finite projective plane corresponding to a Latin square fat-tree, and allocate a second leaf switch group to a second job, the second leaf switch group corresponding a second column, and transmit first schedule information on first communication related to the first job to a first information processing apparatus coupled to the first leaf switch group, and transmit second schedule information on second communication related to the second job to a second information processing apparatus coupled to the second leaf switch group, wherein the first and second communication are collective communication in which each of the information processing apparatuses communicates with others.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: December 24, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Patent number: 10498554
    Abstract: An information processing system includes switches coupled to each other in a form of a Latin square fat-tree and apparatuses coupled to the switches. A processor of a first apparatus coupled to one of first switches executes a first reduce with others of the first apparatuses. A processor of a second apparatus coupled to a representative switch executes a second reduce with representative apparatuses of respective switches belonging to a group corresponding to the second apparatus. The processor of the second apparatus executes Allreduce with others of the second apparatuses and transmits the result of the Allreduce to the representative apparatuses of the respective switches belonging to the group corresponding to the second apparatus. A processor of a representative apparatus that receives the result of the Allreduce transmits the result of the Allreduce to others of apparatuses coupled to a switch to which the representative apparatus is coupled.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: December 3, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Patent number: 10484264
    Abstract: An information processing apparatus includes a memory; and a processor coupled to the memory and the processor configured to exclude a combination for satisfying a condition from multiple combinations each including a number of shifts of multiple switch layers in a fat-tree network using Latin square, create relay settings for multiple switches for performing communication through multiple communication paths corresponding to remain combinations except the combination excluded from the multiple combinations, and transmit correspondingly the created relay settings to the multiple switches.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: November 19, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Publication number: 20190288179
    Abstract: A piezoelectric element includes a first electrode disposed over a substrate, an orientation control layer disposed over the first electrode and containing titanium, a piezoelectric layer disposed over the orientation control layer and having a perovskite crystal structure, and a second electrode disposed over the piezoelectric layer. The orientation control layer has a thickness in the range of 5.0 nm to 22.0 nm.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 19, 2019
    Inventors: Koichi MOROZUMI, Hiromu MIYAZAWA, Toshihiro SHIMIZU, Ichiro ASAOKA
  • Publication number: 20190283421
    Abstract: A liquid ejecting head includes: a nozzle from which a liquid is ejected; a communication passage that is in communication with the nozzle; a first pressure compartment that is connected to the communication passage through a first passage; a second pressure compartment that is connected to the communication passage through a second passage; a first drive element that changes pressure of the first pressure compartment; and a second drive element that changes pressure of the second pressure compartment.
    Type: Application
    Filed: March 13, 2019
    Publication date: September 19, 2019
    Inventors: Hiromu MIYAZAWA, Toshihiro SHIMIZU
  • Patent number: 10391769
    Abstract: Provided is a liquid ejecting head that ejects a liquid in a pressure chamber by a piezoelectric device, the piezoelectric device including a vibration plate, a piezoelectric layer containing lead, a first electrode provided between the vibration plate and the piezoelectric layer, and a second electrode provided on a side opposite to a side of the first electrode as viewed from the piezoelectric layer. The piezoelectric layer is preferentially oriented in a (100) plane, a lattice constant c defined by a crystal plane of the piezoelectric layer parallel to a film surface of the piezoelectric layer and a lattice constant a defined by a crystal plane perpendicular to the film surface satisfy 0.9945?c/a?1.012, and the thickness of the piezoelectric device is twice or more the thickness t (t<5 ?m) of the piezoelectric layer.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: August 27, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Hiromu Miyazawa, Masayuki Omoto, Toshiki Hara, Toshihiro Shimizu, Akira Kuriki
  • Patent number: 10379901
    Abstract: First information includes a sequence of first picking-numbers and a sequence of first sets including input-port identification values for a second number of first topological structures. Second information includes a sequence of second picking-numbers and a sequence of second sets including output-port identification values for a first number of second topological structures. Based on the first and second information, an apparatus determines first and second target picking-numbers so that a product of the first and second target picking-numbers is equal to or greater than a given number smaller than a product of the first and second numbers.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: August 13, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Shimizu, Kohta Nakashima
  • Publication number: 20190229949
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor performs first all-reduce communication with another information processing apparatus coupled to a first leaf switch coupled to the information processing apparatus, performs second all-reduce communication with one information processing apparatus coupled to a second leaf switch included in the same layer as the first leaf switch and third all-reduce communication with one information processing apparatus coupled to a third leaf switch which is coupled to a spine switch coupled to the first leaf switch included in a layer different from the layer including the first leaf switch, using a result of the first all-reduce communication, and transmits a result of a process of the second all-reduce communication and the third all-reduce communication to the another information processing apparatus coupled to the first leaf switch.
    Type: Application
    Filed: March 29, 2019
    Publication date: July 25, 2019
    Inventors: Toshihiro Shimizu, Kohta Nakashima