Patents by Inventor Toshihisa Oishi

Toshihisa Oishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7107458
    Abstract: In an authentication communicating semiconductor device to enhance protection against illegal copying, a logic analyzer probe or the like is connected to a CPU bus to suppress possibility in which the authentication process is intercepted and is analyzed to break the mechanism of illegal copy protection and the electronic device is modified to set a tampered encryption key to the CPU bus. The authentication communicating semiconductor device includes a semiconductor chip, a main processing unit formed on the chip for generating a key code according to a predetermined algorithm, for determining approval/non-approval of communication of data with an external device, and for controlling the communication; an encryption unit formed on the chip for encrypting and decoding communication data using the key code generated by the main processing unit, and an interface unit formed on the chip for conducting communication with an upper-layer or a lower-layer according to a predetermined protocol.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: September 12, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Toshihisa Oishi, Jun Tozawa, Tetsuya Shibayama, Masato Hamada
  • Publication number: 20010052070
    Abstract: In an authentication communicating semiconductor device to enhance protection against illegal copying, a logic analyzer probe or the like is connected to a CPU bus to suppress possibility in which the authentication process is intercepted and is analyzed to break the mechanism of illegal copy protection and the electronic device is modified to set a tampered encryption key to the CPU bus. The authentication communicating semiconductor device includes a semiconductor chip, a main processing unit formed on the chip for generating a key code according to a predetermined algorithm, for determining approval/non-approval of communication of data with an external device, and for controlling the communication; an encryption unit formed on the chip for encrypting and decoding communication data using the key code generated by the main processing unit, and an interface unit formed on the chip for conducting communication with an upper-layer or a lower-layer according to a predetermined protocol.
    Type: Application
    Filed: May 25, 2001
    Publication date: December 13, 2001
    Inventors: Toshihisa Oishi, Jun Tozawa, Tetsuya Shibayama, Masato Hamada