Abstract: A method for manufacturing a wiring substrate includes forming a through-hole penetrating a core layer from one to another surface of the core layer, forming a first metal layer covering the one and the other surface of the core layer and an inner wall surface of the through-hole, forming a second metal layer on the first metal layer, and forming a patterned third metal layer on the second metal layer toward the one surface of the core layer along with forming a patterned fourth metal layer on the second metal layer toward the other surface of the core layer. The forming of the second metal layer includes covering the one and the other surfaces of the core layer and the first metal layer in the through-hole with the second metal layer and closing up a center part of the through-hole with the second metal layer.

Abstract: A method for manufacturing a wiring substrate includes forming a through-hole penetrating a core layer from one to another surface of the core layer, forming a first metal layer covering the one and the other surface of the core layer and an inner wall surface of the through-hole, forming a second metal layer on the first metal layer, and forming a patterned third metal layer on the second metal layer toward the one surface of the core layer along with forming a patterned fourth metal layer on the second metal layer toward the other surface of the core layer. The forming of the second metal layer includes covering the one and the other surfaces of the core layer and the first metal layer in the through-hole with the second metal layer and closing up a center part of the through-hole with the second metal layer.

Abstract: In a wiring board, a plurality of wiring layers and a plurality of insulating layers are alternately stacked. The wiring layers are electrically connected to one another through via holes formed in the insulating layers. The wiring board includes: a connection pad which is disposed on one of the wiring layers that is on the inner side of an outermost wiring layer; and an external connection terminal which is disposed on the connection pad, and which is projected from the surface of the wiring board. The external connection terminal is passed through the outermost wiring layer.

Abstract: In a wiring board, a plurality of wiring layers and a plurality of insulating layers are alternately stacked. The wiring layers are electrically connected to one another through via holes formed in the insulating layers. The wiring board includes: a connection pad which is disposed on one of the wiring layers that is on the inner side of an outermost wiring layer; and an external connection terminal which is disposed on the connection pad, and which is projected from the surface of the wiring board. The external connection terminal is passed through the outermost wiring layer.

Abstract: An optical parts cap of the present invention includes a metal frame having an upper frame portion in which an opening portion is provided to a center portion and an upright frame portion provided to be connected to a lower peripheral portion of the upper frame portion, the metal frame in which a housing portion is provided in an inside of the metal frame by the upright frame portion, a reflection preventing layer formed on an outer surface and an inner surface of the metal frame respectively, and a glass provided to the housing portion of the metal frame, the reflection preventing layer is formed of either the metal oxide layer or the metal plating layer.

Abstract: An optical semiconductor device is disclosed that includes an optical element mounted on a substrate and a window lid sealing the optical element in a space on the substrate. The window lid includes a frame member and a glass plate member. The frame member, formed by performing drawing on a metal plate, includes a top plate part having an opening window, a peripheral side plate part connected to the peripheral edge of the top plate part so as to surround a space thereon, and a flange part extending outward from the peripheral edge of the peripheral side plate part on the side opposite from the top plate part. The glass plate member, contained in the space formed by the top plate part and the peripheral side plate part, is welded to the substrate-side surface of the top plate part and the internal surface of the peripheral side plate part.

Abstract: An optical cap for semiconductor device, the cap comprising: a metal cap body having an opening and a transparent optical window sealed with the metal cap body to cover the opening by means of a sealing member. The sealing member includes a bismuth low-melting point glass containing no lead, an intermediate metal layer attached to the metal cap body, the intermediate metal layer being a metal capable of causing a eutectic reaction with respect to Bi contained in the low-melting point glass, and an eutectic alloy layer thus formed between the low-melting point glass and the intermediate metal layer.

Abstract: An optical semiconductor device is disclosed that includes an optical element mounted on a substrate and a window lid sealing the optical element in a space on the substrate. The window lid includes a frame member and a glass plate member. The frame member, formed by performing drawing on a metal plate, includes a top plate part having an opening window, a peripheral side plate part connected to the peripheral edge of the top plate part so as to surround a space thereon, and a flange part extending outward from the peripheral edge of the peripheral side plate part on the side opposite from the top plate part. The glass plate member, contained in the space formed by the top plate part and the peripheral side plate part, is welded to the substrate-side surface of the top plate part and the internal surface of the peripheral side plate part.

Abstract: An optical cap for semiconductor device, the cap comprising: a metal cap body having an opening and a transparent optical window sealed with the metal cap body to cover the opening by means of a sealing member. The sealing member includes a bismuth low-melting point glass containing no lead, an intermediate metal layer attached to the metal cap body, the intermediate metal layer being a metal capable of causing a eutectic reaction with respect to Bi contained in the low-melting point glass, and an eutectic alloy layer thus formed between the low-melting point glass and the intermediate metal layer.

Abstract: A semiconductor package includes a laminate of substrates having a cavity 16, through-holes 25 and circuit patterns, wherein the through-holes 45 and some of the circuit patterns 18 are coated with a plated nickel/gold coating 50.

Abstract: Disclosed is a nickel electroplating bath or a nickel alloy electroplating bath used for electroplating a conductor partially masked with an organic high-molecular resist layer, wherein the nickel electroplating bath contains a water-soluble nickel salt, and the nickel alloy electroplating bath contains both a water-soluble nickel salt and a water-soluble salt of a metal capable of being alloyed with nickel. The above electroplating bath is incorporated with an electrical conductive salt containing at least one cation selected from the group consisting of an ammonium ion, magnesium ion, calcium ion, aluminum ion, and barium ion. Further, the electrical conductive salt substantially does not contain a sodium ion and a potassium ion as cations. Such an electroplating bath is capable of electroplating a conductor partially masked with an organic high-molecular resist layer without floating of the resist layer.

Abstract: A semiconductor package is produced by the following steps. A plurality of circuit boards are prepared, each board having an opening for forming a cavity and a surface providing with a circuit pattern having bonding sections at a peripheral area of the opening. The bonding sections of the respective circuit boards are covered with protective films. A laminated body is formed by laminating the plurality of circuit boards by means of adhesive sheets arranged between the respective circuit boards. Upper and lower substrates are also laminated on upper and lower surfaces of the plurality of circuit boards, respectively, by means of adhesive sheets to close the cavity. The protective films are subsequently removed from the bonding sections of the respective circuit boards of the laminated body.