Patents by Inventor Toshihito Ochi

Toshihito Ochi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6769610
    Abstract: A credit card double authentication system 1 comprises an item checkout gate 2, an ID authentication check/item checkout unit 3, a personal computer 20 of an in-store card management section 4, an item ID assignment unit 5, a card management center 6 and a credit card company 7 which are connected via a communication line 8 so as to send and receive item information. An individual authenticating unit 11 having an identity authenticating function performs identity authentication based on a card ID 9 of a credit card CC being used by a user P when purchasing an item and based on a personal ID 10 of the user P, thereby preventing unauthorized use of the credit card.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: August 3, 2004
    Assignee: Hitachi Electronic Service Co. Ltd.
    Inventors: Takaaki Habara, Norikazu Yamagishi, Toshihito Ochi, Mutsuharu Takesada, Noriaki Shiomi, Hikaru Numoto, Yoshitaka Kawamura
  • Publication number: 20030052163
    Abstract: A credit card double authentication system 1 comprises an item checkout gate 2, an ID authentication check/item checkout unit 3, a personal computer 20 of an in-store card management section 4, an item ID assignment unit 5, a card management center 6 and a credit card company 7 which are connected via a communication line 8 so as to send and receive item information. An individual authenticating unit 11 having an identity authenticating function performs identity authentication based on a card ID 9 of a credit card CC being used by a user P when purchasing an item and based on a personal ID 10 of the user P, thereby preventing unauthorized use of the credit card.
    Type: Application
    Filed: September 5, 2002
    Publication date: March 20, 2003
    Applicant: Hitachi Electronic Service Co. Ltd.
    Inventors: Takaaki Habara, Norikazu Yamagishi, Toshihito Ochi, Mutsuharu Takesada, Noriaki Shiomi, Hikaru Numoto, Yoshitaka Kawamura
  • Patent number: 6122257
    Abstract: In a bus type LAN, the data transmitted from a terminal (14) is detected by an adapter (1) connected to one end of a bus (3), and in response thereto the adapter (1) transmits a pulse signal onto the bus (3). An adapter (2) connected to the other end of the bus (3) receives the data transmitted from the terminal (14) and detects its source terminal address. A difference in time between the arrival of the data from the terminal (14) and the arrival of the pulse signal from the adapter (1) is measured by a counter circuit (21), and the count value obtained is stored in a memory (23), forming a pair with the corresponding source terminal address. Thus, the count value can be obtained for each terminal during the normal operation of the LAN. The data of the memory (23) are extracted by a personal computer (5), where the physical position of each terminal is calculated in accordance with the bus propagation velocity, and is displayed or printed out as a physical constitution diagram.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: September 19, 2000
    Assignees: Hitachi Electronics Services Co, Ltd, Link Laboratory Inc.
    Inventors: Naoyoshi Machida, Toshihito Ochi, Hiromi Kawaguchi, Mineo Ogino, Masahiko Kurata, Masato Tachibana, Tadayuki Ichiba