Patents by Inventor Toshiji Ishii

Toshiji Ishii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6535425
    Abstract: A nonvolatile semiconductor memory device of the present invention includes: a first booster circuit for generating a first voltage higher than a voltage supplied by an external power source, the first booster circuit being used for writing or deleting of data; a second booster circuit for generating a second voltage higher than the voltage supplied by the external power source, the second booster being used for reading of data; a regulator for controlling the first voltage, the regulator being connected to an output terminal of the first booster circuit; and a reference voltage generator circuit for generating a reference voltage input to the regulator.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: March 18, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masaru Nawaki, Makoto Ihara, Toshiji Ishii
  • Publication number: 20020101762
    Abstract: A nonvolatile semiconductor memory device of the present invention includes: a first booster circuit for generating a first voltage higher than a voltage supplied by an external power source, the first booster circuit being used for writing or deleting of data; a second booster circuit for generating a second voltage higher than the voltage supplied by the external power source, the second booster being used for reading of data; a regulator for controlling the first voltage, the regulator being connected to an output terminal of the first booster circuit; and a reference voltage generator circuit for generating a reference voltage input to the regulator.
    Type: Application
    Filed: January 28, 2002
    Publication date: August 1, 2002
    Inventors: Masaru Nawaki, Makoto Ihara, Toshiji Ishii
  • Patent number: 6348723
    Abstract: A semiconductor device according to the present invention includes: a semiconductor substrate; a signal wire, disposed on the semiconductor substrate, for transmitting a signal between circuits; and a dummy wire disposed between the signal wire and the region of the semiconductor substrate to form a parasitic capacitance with the signal wire, wherein a signal, which has the same phase as a phase of a signal supplied to the signal wire, is supplied to the dummy wire.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: February 19, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshiji Ishii
  • Patent number: 6088279
    Abstract: A semiconductor memory device includes a plurality of word lines and a plurality of bit lines arranged in a matrix and memory cells provided at intersections of the plurality of word lines and the plurality of bit lines. A dummy word line for detecting a low to high transition of a word line is provided parallel to the word line. By providing a dummy word line longer in length than a word line or the like to increase the delay in transition of the dummy word line, a reference potential to be detected can be set lower than conventional to reduce variation in detection timing.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: July 11, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshiji Ishii
  • Patent number: 5453709
    Abstract: A delay circuit comprises first modified inverter circuits, a first compensating circuit, second modified inverter circuits and second compensating circuit. Each first modified inverter circuit is composed of a CMOS inverter and an additional NMOS transistor. The CMOS inverter has an NMOS and a PMOS transistor connected in complementary connection between a positive power supply and ground. The additional NMOS transistor controls the current from the first modified inverter circuit to the ground. The first compensating circuit is connected to the gate of each additional NMOS transistor to supply an output signal for compensating a change in characteristic of the additional NMOS transistors. Each second modified inverter circuit is composed of a CMOS inverter and an additional PMOS transistor. The additional PMOS transistor controls a current from the second modified inverter circuit to the positive power supply.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: September 26, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichi Tanimoto, Toshiji Ishii
  • Patent number: 5408172
    Abstract: A step-down circuit for power supply voltage, which converts an external power supply voltage into a first voltage that is lower than the external power supply voltage so as to apply it to an internal circuit, is provided with: a reference voltage generation circuit for generating a reference voltage from an external power supply voltage, a differential amplification circuit for releasing a difference between the reference voltage and the first voltage as a control signal, a driving circuit for controlling a driving current to be supplied to the internal circuit according to the control signal from the differential amplification circuit, a signal generation circuit for releasing a detection signal by detecting an increase of consumption current in the internal circuit, and a control means for controlling the driving circuit so as to increase the current to be supplied to the internal circuit in accordance with the detection signal from the signal generation circuit.
    Type: Grant
    Filed: August 13, 1993
    Date of Patent: April 18, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichi Tanimoto, Toshiji Ishii
  • Patent number: 5138500
    Abstract: A magnetic tape recording/reproducing device samples analog acoustic signals and converts the signals into digital acoustic signals. Analog video signals are sampled for every field and converted into digital video signals. The converted digital acoustic signals and digital video signals are recorded sequentially on a magnetic tape so that both the digital acoustic and digital video signals can be reproduced properly.
    Type: Grant
    Filed: November 29, 1989
    Date of Patent: August 11, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yukihiko Haikawa, Toshiji Ishii
  • Patent number: 5099375
    Abstract: A rotary drum magnetic storage apparatus as four magnetic heads fixed above the periphery of the drum. Two of the heads are read heads and the other two heads are write heads. A magnetic tape contacts the periphery of the drum at a specific contact angle. The rotary drum of the magnetic head is of the small type that is less than 30 mm. To avoid overlapping of tracing periods of the heads of the storage apparatus during operation, there is a specific relationship fixed between the write heads, the read heads and the contact angle the magnetic tape makes with the drum.
    Type: Grant
    Filed: January 25, 1990
    Date of Patent: March 24, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiji Ishii, Yukihiko Haikawa
  • Patent number: 5051848
    Abstract: Two magnetic heads having different azimuth angles are mounted on a cylindrical rotary drum. The data is recorded on the magnetic tape by means of the magnetic heads mounted on the rotary drum. When recording, a frame is composed of one track formed by one magnetic head, and another track formed by the other magnetic head. The data is recorded in the unit of one frame. When reproducing, one track is read by one magnetic head, and the other track is read by the other magnetic head. Plural sets of data to compose one frame are stored in the memory, when reproducing in the normal direction, as the addresses are specified for each set of data. The data stored in the memory is read out from the memory as the addresses are specified so as to be output in a predetermined sequence.
    Type: Grant
    Filed: May 9, 1989
    Date of Patent: September 24, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiji Ishii, Kengo Sudoh
  • Patent number: 4095204
    Abstract: A transformer having a forced air cooling system is disclosed. The transformer includes an insulating oil which is forcibly moved in the transformer and an insulating sheet which is partially covered with particles, fibers or other forms of an inorganic material for producing a static charge of opposite polarity to the charge produced by the base material of the insulating sheet caused by relative motion due to forced flow of the insulating oil.
    Type: Grant
    Filed: January 15, 1976
    Date of Patent: June 13, 1978
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Teruo Miyamoto, Toshiji Ishii, Yoshikazu Miura, Tohei Nitta