Patents by Inventor Toshikazu Ogino

Toshikazu Ogino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Amplifier having a field-effect transistor with gate biased at a potential lower than source potential
    Patent number: 5548247
    Abstract: An amplifier includes: a FET having a source electrode, a drain electrode and a gate electrode, wherein an input signal input to the gate electrode is amplified by the FET and an output signal indicating the amplified input signal is output from the drain electrode; a first voltage biasing unit, coupled to the source electrode of the FET, for biasing the source electrode at a preset positive potential; and a second voltage biasing unit, coupled to the gate electrode of the FET, for biasing the gate electrode at a potential lower than the potential of the source electrode during the operation of the FET.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: August 20, 1996
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Toshikazu Ogino, Ryoji Yamamoto