Abstract: A positive counter starts counting, starting with an initial value, upon receiving a positive edge of a dimming pulse signal. A negative edge counter starts counting, starting with an initial value, upon receiving a negative edge of the dimming pulse signal. For each i-th (2?i?n) channel, the phase shift amount is calculated by multiplying a period count value that indicates the period of the dimming pulse signal by (i?1)/n. When the count value matches the phase shift amount, a burst control signal is switched to a first level. When the count value matches the phase shift amount, the burst control signal is switched to a second level.

Abstract: A positive counter starts counting, starting with an initial value, upon receiving a positive edge of a dimming pulse signal. A negative edge counter starts counting, starting with an initial value, upon receiving a negative edge of the dimming pulse signal. For each i-th (2?i?n) channel, the phase shift amount is calculated by multiplying a period count value that indicates the period of the dimming pulse signal by (i?1)/n. When the count value matches the phase shift amount, a burst control signal is switched to a first level. When the count value matches the phase shift amount, the burst control signal is switched to a second level.

Abstract: The display device includes a plurality of display elements to be driven selectively or simultaneously; a storage unit for storing display data to be displayed by the display elements; a storage control unit for generating a display inhibition signal for a predetermined period of time from turning-on of a power supply till the display data of the storage unit is made definite; and a display driving control unit for breaking supply of a driving current to the display elements when the storage control unit is generating the display inhibition signal.

Abstract: LED pairs each consisting of two LEDs are arranged in a matrix form to constitute a LED module. Receiving an external clock signal, a timing control circuit generates common signals that set on-periods of drive currents for the LEDs. Each display drive circuit includes first and second drive elements. The first drive element commonly serves the two LEDs of the LED pair, and is turned on during the on-period set by the common signal. The second drive element has two transistors that separately serve the two LEDs of the LED pair and are turned on in accordance with respective color selection signals. The display drive circuits selectively provide drive currents to the LEDs through the first and second drive elements being turned on. When detecting a stop of the clock signal, a common signal control circuit cut off the first drive elements by canceling the common signals.